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STM32CubeF4 HAL / LL Drivers API Reference
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stm32f4xx_ll_rtc.h
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1
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32F4xx_LL_RTC_H
21#define STM32F4xx_LL_RTC_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32f4xx.h"
29
33
34#if defined(RTC)
35
39
40/* Private types -------------------------------------------------------------*/
41/* Private variables ---------------------------------------------------------*/
42/* Private constants ---------------------------------------------------------*/
46/* Masks Definition */
47#define RTC_INIT_MASK 0xFFFFFFFFU
48#define RTC_RSF_MASK ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
49
50/* Write protection defines */
51#define RTC_WRITE_PROTECTION_DISABLE ((uint8_t)0xFFU)
52#define RTC_WRITE_PROTECTION_ENABLE_1 ((uint8_t)0xCAU)
53#define RTC_WRITE_PROTECTION_ENABLE_2 ((uint8_t)0x53U)
54
55/* Defines used to combine date & time */
56#define RTC_OFFSET_WEEKDAY 24U
57#define RTC_OFFSET_DAY 16U
58#define RTC_OFFSET_MONTH 8U
59#define RTC_OFFSET_HOUR 16U
60#define RTC_OFFSET_MINUTE 8U
61
65
66/* Private macros ------------------------------------------------------------*/
67#if defined(USE_FULL_LL_DRIVER)
74#endif /*USE_FULL_LL_DRIVER*/
75
76/* Exported types ------------------------------------------------------------*/
77#if defined(USE_FULL_LL_DRIVER)
81
85typedef struct
86{
87 uint32_t HourFormat;
92
93 uint32_t AsynchPrescaler;
98
99 uint32_t SynchPrescaler;
104} LL_RTC_InitTypeDef;
105
109typedef struct
110{
111 uint32_t TimeFormat;
115
116 uint8_t Hours;
121
122 uint8_t Minutes;
126
127 uint8_t Seconds;
131} LL_RTC_TimeTypeDef;
132
136typedef struct
137{
138 uint8_t WeekDay;
142
143 uint8_t Month;
147
148 uint8_t Day;
152
153 uint8_t Year;
157} LL_RTC_DateTypeDef;
158
162typedef struct
163{
164 LL_RTC_TimeTypeDef AlarmTime;
165
166 uint32_t AlarmMask;
172
173 uint32_t AlarmDateWeekDaySel;
179
180 uint8_t AlarmDateWeekDay;
191} LL_RTC_AlarmTypeDef;
192
196#endif /* USE_FULL_LL_DRIVER */
197
198/* Exported constants --------------------------------------------------------*/
202
203#if defined(USE_FULL_LL_DRIVER)
207#define LL_RTC_FORMAT_BIN 0x00000000U
208#define LL_RTC_FORMAT_BCD 0x00000001U
212
216#define LL_RTC_ALMA_DATEWEEKDAYSEL_DATE 0x00000000U
217#define LL_RTC_ALMA_DATEWEEKDAYSEL_WEEKDAY RTC_ALRMAR_WDSEL
221
225#define LL_RTC_ALMB_DATEWEEKDAYSEL_DATE 0x00000000U
226#define LL_RTC_ALMB_DATEWEEKDAYSEL_WEEKDAY RTC_ALRMBR_WDSEL
230
231#endif /* USE_FULL_LL_DRIVER */
232
237#define LL_RTC_ISR_RECALPF RTC_ISR_RECALPF
238#if defined(RTC_TAMPER2_SUPPORT)
239#define LL_RTC_ISR_TAMP2F RTC_ISR_TAMP2F
240#endif /* RTC_TAMPER2_SUPPORT */
241#define LL_RTC_ISR_TAMP1F RTC_ISR_TAMP1F
242#define LL_RTC_ISR_TSOVF RTC_ISR_TSOVF
243#define LL_RTC_ISR_TSF RTC_ISR_TSF
244#define LL_RTC_ISR_WUTF RTC_ISR_WUTF
245#define LL_RTC_ISR_ALRBF RTC_ISR_ALRBF
246#define LL_RTC_ISR_ALRAF RTC_ISR_ALRAF
247#define LL_RTC_ISR_INITF RTC_ISR_INITF
248#define LL_RTC_ISR_RSF RTC_ISR_RSF
249#define LL_RTC_ISR_INITS RTC_ISR_INITS
250#define LL_RTC_ISR_SHPF RTC_ISR_SHPF
251#define LL_RTC_ISR_WUTWF RTC_ISR_WUTWF
252#define LL_RTC_ISR_ALRBWF RTC_ISR_ALRBWF
253#define LL_RTC_ISR_ALRAWF RTC_ISR_ALRAWF
257
262#define LL_RTC_CR_TSIE RTC_CR_TSIE
263#define LL_RTC_CR_WUTIE RTC_CR_WUTIE
264#define LL_RTC_CR_ALRBIE RTC_CR_ALRBIE
265#define LL_RTC_CR_ALRAIE RTC_CR_ALRAIE
266#define LL_RTC_TAFCR_TAMPIE RTC_TAFCR_TAMPIE
270
274#define LL_RTC_WEEKDAY_MONDAY ((uint8_t)0x01U)
275#define LL_RTC_WEEKDAY_TUESDAY ((uint8_t)0x02U)
276#define LL_RTC_WEEKDAY_WEDNESDAY ((uint8_t)0x03U)
277#define LL_RTC_WEEKDAY_THURSDAY ((uint8_t)0x04U)
278#define LL_RTC_WEEKDAY_FRIDAY ((uint8_t)0x05U)
279#define LL_RTC_WEEKDAY_SATURDAY ((uint8_t)0x06U)
280#define LL_RTC_WEEKDAY_SUNDAY ((uint8_t)0x07U)
284
288#define LL_RTC_MONTH_JANUARY ((uint8_t)0x01U)
289#define LL_RTC_MONTH_FEBRUARY ((uint8_t)0x02U)
290#define LL_RTC_MONTH_MARCH ((uint8_t)0x03U)
291#define LL_RTC_MONTH_APRIL ((uint8_t)0x04U)
292#define LL_RTC_MONTH_MAY ((uint8_t)0x05U)
293#define LL_RTC_MONTH_JUNE ((uint8_t)0x06U)
294#define LL_RTC_MONTH_JULY ((uint8_t)0x07U)
295#define LL_RTC_MONTH_AUGUST ((uint8_t)0x08U)
296#define LL_RTC_MONTH_SEPTEMBER ((uint8_t)0x09U)
297#define LL_RTC_MONTH_OCTOBER ((uint8_t)0x10U)
298#define LL_RTC_MONTH_NOVEMBER ((uint8_t)0x11U)
299#define LL_RTC_MONTH_DECEMBER ((uint8_t)0x12U)
303
307#define LL_RTC_HOURFORMAT_24HOUR 0x00000000U
308#define LL_RTC_HOURFORMAT_AMPM RTC_CR_FMT
312
316#define LL_RTC_ALARMOUT_DISABLE 0x00000000U
317#define LL_RTC_ALARMOUT_ALMA RTC_CR_OSEL_0
318#define LL_RTC_ALARMOUT_ALMB RTC_CR_OSEL_1
319#define LL_RTC_ALARMOUT_WAKEUP RTC_CR_OSEL
323
327#define LL_RTC_ALARM_OUTPUTTYPE_OPENDRAIN 0x00000000U
328#define LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL RTC_TAFCR_ALARMOUTTYPE
332
336#define LL_RTC_OUTPUTPOLARITY_PIN_HIGH 0x00000000U
337#define LL_RTC_OUTPUTPOLARITY_PIN_LOW RTC_CR_POL
341
345#define LL_RTC_TIME_FORMAT_AM_OR_24 0x00000000U
346#define LL_RTC_TIME_FORMAT_PM RTC_TR_PM
350
354#define LL_RTC_SHIFT_SECOND_DELAY 0x00000000U /* Delay (seconds) = SUBFS / (PREDIV_S + 1) */
355#define LL_RTC_SHIFT_SECOND_ADVANCE RTC_SHIFTR_ADD1S /* Advance (seconds) = (1 - (SUBFS / (PREDIV_S + 1))) */
359
363#define LL_RTC_ALMA_MASK_NONE 0x00000000U
364#define LL_RTC_ALMA_MASK_DATEWEEKDAY RTC_ALRMAR_MSK4
365#define LL_RTC_ALMA_MASK_HOURS RTC_ALRMAR_MSK3
366#define LL_RTC_ALMA_MASK_MINUTES RTC_ALRMAR_MSK2
367#define LL_RTC_ALMA_MASK_SECONDS RTC_ALRMAR_MSK1
368#define LL_RTC_ALMA_MASK_ALL (RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1)
372
376#define LL_RTC_ALMA_TIME_FORMAT_AM 0x00000000U
377#define LL_RTC_ALMA_TIME_FORMAT_PM RTC_ALRMAR_PM
381
385#define LL_RTC_ALMB_MASK_NONE 0x00000000U
386#define LL_RTC_ALMB_MASK_DATEWEEKDAY RTC_ALRMBR_MSK4
387#define LL_RTC_ALMB_MASK_HOURS RTC_ALRMBR_MSK3
388#define LL_RTC_ALMB_MASK_MINUTES RTC_ALRMBR_MSK2
389#define LL_RTC_ALMB_MASK_SECONDS RTC_ALRMBR_MSK1
390#define LL_RTC_ALMB_MASK_ALL (RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1)
394
398#define LL_RTC_ALMB_TIME_FORMAT_AM 0x00000000U
399#define LL_RTC_ALMB_TIME_FORMAT_PM RTC_ALRMBR_PM
403
407#define LL_RTC_TIMESTAMP_EDGE_RISING 0x00000000U
408#define LL_RTC_TIMESTAMP_EDGE_FALLING RTC_CR_TSEDGE
412
416#define LL_RTC_TS_TIME_FORMAT_AM 0x00000000U
417#define LL_RTC_TS_TIME_FORMAT_PM RTC_TSTR_PM
421
425#define LL_RTC_TAMPER_1 RTC_TAFCR_TAMP1E
426#if defined(RTC_TAMPER2_SUPPORT)
427#define LL_RTC_TAMPER_2 RTC_TAFCR_TAMP2E
428#endif /* RTC_TAMPER2_SUPPORT */
432
436#define LL_RTC_TAMPER_DURATION_1RTCCLK 0x00000000U
437#define LL_RTC_TAMPER_DURATION_2RTCCLK RTC_TAFCR_TAMPPRCH_0
438#define LL_RTC_TAMPER_DURATION_4RTCCLK RTC_TAFCR_TAMPPRCH_1
439#define LL_RTC_TAMPER_DURATION_8RTCCLK RTC_TAFCR_TAMPPRCH
443
447#define LL_RTC_TAMPER_FILTER_DISABLE 0x00000000U
448#define LL_RTC_TAMPER_FILTER_2SAMPLE RTC_TAFCR_TAMPFLT_0
449#define LL_RTC_TAMPER_FILTER_4SAMPLE RTC_TAFCR_TAMPFLT_1
450#define LL_RTC_TAMPER_FILTER_8SAMPLE RTC_TAFCR_TAMPFLT
454
458#define LL_RTC_TAMPER_SAMPLFREQDIV_32768 0x00000000U
459#define LL_RTC_TAMPER_SAMPLFREQDIV_16384 RTC_TAFCR_TAMPFREQ_0
460#define LL_RTC_TAMPER_SAMPLFREQDIV_8192 RTC_TAFCR_TAMPFREQ_1
461#define LL_RTC_TAMPER_SAMPLFREQDIV_4096 (RTC_TAFCR_TAMPFREQ_1 | RTC_TAFCR_TAMPFREQ_0)
462#define LL_RTC_TAMPER_SAMPLFREQDIV_2048 RTC_TAFCR_TAMPFREQ_2
463#define LL_RTC_TAMPER_SAMPLFREQDIV_1024 (RTC_TAFCR_TAMPFREQ_2 | RTC_TAFCR_TAMPFREQ_0)
464#define LL_RTC_TAMPER_SAMPLFREQDIV_512 (RTC_TAFCR_TAMPFREQ_2 | RTC_TAFCR_TAMPFREQ_1)
465#define LL_RTC_TAMPER_SAMPLFREQDIV_256 RTC_TAFCR_TAMPFREQ
469
473#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 RTC_TAFCR_TAMP1TRG
474#if defined(RTC_TAMPER2_SUPPORT)
475#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 RTC_TAFCR_TAMP2TRG
476#endif /* RTC_TAMPER2_SUPPORT */
480
484#define LL_RTC_WAKEUPCLOCK_DIV_16 0x00000000U
485#define LL_RTC_WAKEUPCLOCK_DIV_8 (RTC_CR_WUCKSEL_0)
486#define LL_RTC_WAKEUPCLOCK_DIV_4 (RTC_CR_WUCKSEL_1)
487#define LL_RTC_WAKEUPCLOCK_DIV_2 (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_0)
488#define LL_RTC_WAKEUPCLOCK_CKSPRE (RTC_CR_WUCKSEL_2)
489#define LL_RTC_WAKEUPCLOCK_CKSPRE_WUT (RTC_CR_WUCKSEL_2 | RTC_CR_WUCKSEL_1)
493
497#define LL_RTC_BKP_DR0 0x00000000U
498#define LL_RTC_BKP_DR1 0x00000001U
499#define LL_RTC_BKP_DR2 0x00000002U
500#define LL_RTC_BKP_DR3 0x00000003U
501#define LL_RTC_BKP_DR4 0x00000004U
502#define LL_RTC_BKP_DR5 0x00000005U
503#define LL_RTC_BKP_DR6 0x00000006U
504#define LL_RTC_BKP_DR7 0x00000007U
505#define LL_RTC_BKP_DR8 0x00000008U
506#define LL_RTC_BKP_DR9 0x00000009U
507#define LL_RTC_BKP_DR10 0x0000000AU
508#define LL_RTC_BKP_DR11 0x0000000BU
509#define LL_RTC_BKP_DR12 0x0000000CU
510#define LL_RTC_BKP_DR13 0x0000000DU
511#define LL_RTC_BKP_DR14 0x0000000EU
512#define LL_RTC_BKP_DR15 0x0000000FU
513#define LL_RTC_BKP_DR16 0x00000010U
514#define LL_RTC_BKP_DR17 0x00000011U
515#define LL_RTC_BKP_DR18 0x00000012U
516#define LL_RTC_BKP_DR19 0x00000013U
520
524#define LL_RTC_CALIB_OUTPUT_NONE 0x00000000U
525#define LL_RTC_CALIB_OUTPUT_1HZ (RTC_CR_COE | RTC_CR_COSEL)
526#define LL_RTC_CALIB_OUTPUT_512HZ (RTC_CR_COE)
530
534#define LL_RTC_CALIB_SIGN_POSITIVE 0x00000000U
535#define LL_RTC_CALIB_SIGN_NEGATIVE RTC_CALIBR_DCS
539
543#define LL_RTC_CALIB_INSERTPULSE_NONE 0x00000000U
544#define LL_RTC_CALIB_INSERTPULSE_SET RTC_CALR_CALP
548
552#define LL_RTC_CALIB_PERIOD_32SEC 0x00000000U
553#define LL_RTC_CALIB_PERIOD_16SEC RTC_CALR_CALW16
554#define LL_RTC_CALIB_PERIOD_8SEC RTC_CALR_CALW8
558
562#define LL_RTC_TimeStampPin_Default 0x00000000U
563#if defined(RTC_AF2_SUPPORT)
564#define LL_RTC_TimeStampPin_Pos1 RTC_TAFCR_TSINSEL
565#endif /* RTC_AF2_SUPPORT */
569
573#define LL_RTC_TamperPin_Default 0x00000000U
574#if defined(RTC_AF2_SUPPORT)
575#define LL_RTC_TamperPin_Pos1 RTC_TAFCR_TAMP1INSEL
576#endif /* RTC_AF2_SUPPORT */
580
584
585/* Exported macro ------------------------------------------------------------*/
589
593
601#define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
602
609#define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
613
617
623#define __LL_RTC_CONVERT_BIN2BCD(__VALUE__) (uint8_t)((((__VALUE__) / 10U) << 4U) | ((__VALUE__) % 10U))
624
630#define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU))
631
635
639
652#define __LL_RTC_GET_WEEKDAY(__RTC_DATE__) (((__RTC_DATE__) >> RTC_OFFSET_WEEKDAY) & 0x000000FFU)
653
659#define __LL_RTC_GET_YEAR(__RTC_DATE__) ((__RTC_DATE__) & 0x000000FFU)
660
678#define __LL_RTC_GET_MONTH(__RTC_DATE__) (((__RTC_DATE__) >>RTC_OFFSET_MONTH) & 0x000000FFU)
679
685#define __LL_RTC_GET_DAY(__RTC_DATE__) (((__RTC_DATE__) >>RTC_OFFSET_DAY) & 0x000000FFU)
686
690
694
700#define __LL_RTC_GET_HOUR(__RTC_TIME__) (((__RTC_TIME__) >> RTC_OFFSET_HOUR) & 0x000000FFU)
701
707#define __LL_RTC_GET_MINUTE(__RTC_TIME__) (((__RTC_TIME__) >> RTC_OFFSET_MINUTE) & 0x000000FFU)
708
714#define __LL_RTC_GET_SECOND(__RTC_TIME__) ((__RTC_TIME__) & 0x000000FFU)
715
719
723
724/* Exported functions --------------------------------------------------------*/
728
732
744__STATIC_INLINE void LL_RTC_SetHourFormat(RTC_TypeDef *RTCx, uint32_t HourFormat)
745{
746 MODIFY_REG(RTCx->CR, RTC_CR_FMT, HourFormat);
747}
748
757__STATIC_INLINE uint32_t LL_RTC_GetHourFormat(RTC_TypeDef *RTCx)
758{
759 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT));
760}
761
774__STATIC_INLINE void LL_RTC_SetAlarmOutEvent(RTC_TypeDef *RTCx, uint32_t AlarmOutput)
775{
776 MODIFY_REG(RTCx->CR, RTC_CR_OSEL, AlarmOutput);
777}
778
789__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutEvent(RTC_TypeDef *RTCx)
790{
791 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL));
792}
793
804__STATIC_INLINE void LL_RTC_SetAlarmOutputType(RTC_TypeDef *RTCx, uint32_t Output)
805{
806 MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_ALARMOUTTYPE, Output);
807}
808
818__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutputType(RTC_TypeDef *RTCx)
819{
820 return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_ALARMOUTTYPE));
821}
822
832__STATIC_INLINE void LL_RTC_EnableInitMode(RTC_TypeDef *RTCx)
833{
834 /* Set the Initialization mode */
835 WRITE_REG(RTCx->ISR, RTC_INIT_MASK);
836}
837
844__STATIC_INLINE void LL_RTC_DisableInitMode(RTC_TypeDef *RTCx)
845{
846 /* Exit Initialization mode */
847 WRITE_REG(RTCx->ISR, (uint32_t)~RTC_ISR_INIT);
848}
849
860__STATIC_INLINE void LL_RTC_SetOutputPolarity(RTC_TypeDef *RTCx, uint32_t Polarity)
861{
862 MODIFY_REG(RTCx->CR, RTC_CR_POL, Polarity);
863}
864
873__STATIC_INLINE uint32_t LL_RTC_GetOutputPolarity(RTC_TypeDef *RTCx)
874{
875 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL));
876}
877
885__STATIC_INLINE void LL_RTC_EnableShadowRegBypass(RTC_TypeDef *RTCx)
886{
887 SET_BIT(RTCx->CR, RTC_CR_BYPSHAD);
888}
889
896__STATIC_INLINE void LL_RTC_DisableShadowRegBypass(RTC_TypeDef *RTCx)
897{
898 CLEAR_BIT(RTCx->CR, RTC_CR_BYPSHAD);
899}
900
907__STATIC_INLINE uint32_t LL_RTC_IsShadowRegBypassEnabled(RTC_TypeDef *RTCx)
908{
909 return ((READ_BIT(RTCx->CR, RTC_CR_BYPSHAD) == (RTC_CR_BYPSHAD)) ? 1UL : 0UL);
910}
911
920__STATIC_INLINE void LL_RTC_EnableRefClock(RTC_TypeDef *RTCx)
921{
922 SET_BIT(RTCx->CR, RTC_CR_REFCKON);
923}
924
933__STATIC_INLINE void LL_RTC_DisableRefClock(RTC_TypeDef *RTCx)
934{
935 CLEAR_BIT(RTCx->CR, RTC_CR_REFCKON);
936}
937
945__STATIC_INLINE void LL_RTC_SetAsynchPrescaler(RTC_TypeDef *RTCx, uint32_t AsynchPrescaler)
946{
947 MODIFY_REG(RTCx->PRER, RTC_PRER_PREDIV_A, AsynchPrescaler << RTC_PRER_PREDIV_A_Pos);
948}
949
957__STATIC_INLINE void LL_RTC_SetSynchPrescaler(RTC_TypeDef *RTCx, uint32_t SynchPrescaler)
958{
959 MODIFY_REG(RTCx->PRER, RTC_PRER_PREDIV_S, SynchPrescaler);
960}
961
968__STATIC_INLINE uint32_t LL_RTC_GetAsynchPrescaler(RTC_TypeDef *RTCx)
969{
970 return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_A) >> RTC_PRER_PREDIV_A_Pos);
971}
972
979__STATIC_INLINE uint32_t LL_RTC_GetSynchPrescaler(RTC_TypeDef *RTCx)
980{
981 return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_S));
982}
983
990__STATIC_INLINE void LL_RTC_EnableWriteProtection(RTC_TypeDef *RTCx)
991{
992 WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_DISABLE);
993}
994
1001__STATIC_INLINE void LL_RTC_DisableWriteProtection(RTC_TypeDef *RTCx)
1002{
1003 WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_1);
1004 WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_2);
1005}
1006
1010
1014
1026__STATIC_INLINE void LL_RTC_TIME_SetFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat)
1027{
1028 MODIFY_REG(RTCx->TR, RTC_TR_PM, TimeFormat);
1029}
1030
1043__STATIC_INLINE uint32_t LL_RTC_TIME_GetFormat(RTC_TypeDef *RTCx)
1044{
1045 return (uint32_t)(READ_BIT(RTCx->TR, RTC_TR_PM));
1046}
1047
1059__STATIC_INLINE void LL_RTC_TIME_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
1060{
1061 MODIFY_REG(RTCx->TR, (RTC_TR_HT | RTC_TR_HU),
1062 (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos)));
1063}
1064
1078__STATIC_INLINE uint32_t LL_RTC_TIME_GetHour(RTC_TypeDef *RTCx)
1079{
1080 return (uint32_t)((READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU))) >> RTC_TR_HU_Pos);
1081}
1082
1094__STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
1095{
1096 MODIFY_REG(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU),
1097 (((Minutes & 0xF0U) << (RTC_TR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_TR_MNU_Pos)));
1098}
1099
1113__STATIC_INLINE uint32_t LL_RTC_TIME_GetMinute(RTC_TypeDef *RTCx)
1114{
1115 return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU)) >> RTC_TR_MNU_Pos);
1116}
1117
1129__STATIC_INLINE void LL_RTC_TIME_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
1130{
1131 MODIFY_REG(RTCx->TR, (RTC_TR_ST | RTC_TR_SU),
1132 (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos)));
1133}
1134
1148__STATIC_INLINE uint32_t LL_RTC_TIME_GetSecond(RTC_TypeDef *RTCx)
1149{
1150 return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_ST | RTC_TR_SU)) >> RTC_TR_SU_Pos);
1151}
1152
1174__STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
1175{
1176 uint32_t temp;
1177
1178 temp = Format12_24 | \
1179 (((Hours & 0xF0U) << (RTC_TR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_TR_HU_Pos)) | \
1180 (((Minutes & 0xF0U) << (RTC_TR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_TR_MNU_Pos)) | \
1181 (((Seconds & 0xF0U) << (RTC_TR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_TR_SU_Pos));
1182 MODIFY_REG(RTCx->TR, (RTC_TR_PM | RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU), temp);
1183}
1184
1202__STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx)
1203{
1204 return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU)));
1205}
1206
1214__STATIC_INLINE void LL_RTC_TIME_EnableDayLightStore(RTC_TypeDef *RTCx)
1215{
1216 SET_BIT(RTCx->CR, RTC_CR_BKP);
1217}
1218
1226__STATIC_INLINE void LL_RTC_TIME_DisableDayLightStore(RTC_TypeDef *RTCx)
1227{
1228 CLEAR_BIT(RTCx->CR, RTC_CR_BKP);
1229}
1230
1237__STATIC_INLINE uint32_t LL_RTC_TIME_IsDayLightStoreEnabled(RTC_TypeDef *RTCx)
1238{
1239 return ((READ_BIT(RTCx->CR, RTC_CR_BKP) == (RTC_CR_BKP)) ? 1UL : 0UL);
1240}
1241
1249__STATIC_INLINE void LL_RTC_TIME_DecHour(RTC_TypeDef *RTCx)
1250{
1251 SET_BIT(RTCx->CR, RTC_CR_SUB1H);
1252}
1253
1261__STATIC_INLINE void LL_RTC_TIME_IncHour(RTC_TypeDef *RTCx)
1262{
1263 SET_BIT(RTCx->CR, RTC_CR_ADD1H);
1264}
1265
1280__STATIC_INLINE uint32_t LL_RTC_TIME_GetSubSecond(RTC_TypeDef *RTCx)
1281{
1282 return (uint32_t)(READ_BIT(RTCx->SSR, RTC_SSR_SS));
1283}
1284
1299__STATIC_INLINE void LL_RTC_TIME_Synchronize(RTC_TypeDef *RTCx, uint32_t ShiftSecond, uint32_t Fraction)
1300{
1301 WRITE_REG(RTCx->SHIFTR, ShiftSecond | Fraction);
1302}
1303
1307
1311
1321__STATIC_INLINE void LL_RTC_DATE_SetYear(RTC_TypeDef *RTCx, uint32_t Year)
1322{
1323 MODIFY_REG(RTCx->DR, (RTC_DR_YT | RTC_DR_YU),
1324 (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos)));
1325}
1326
1337__STATIC_INLINE uint32_t LL_RTC_DATE_GetYear(RTC_TypeDef *RTCx)
1338{
1339 return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_YT | RTC_DR_YU))) >> RTC_DR_YU_Pos);
1340}
1341
1356__STATIC_INLINE void LL_RTC_DATE_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
1357{
1358 MODIFY_REG(RTCx->DR, RTC_DR_WDU, WeekDay << RTC_DR_WDU_Pos);
1359}
1360
1376__STATIC_INLINE uint32_t LL_RTC_DATE_GetWeekDay(RTC_TypeDef *RTCx)
1377{
1378 return (uint32_t)(READ_BIT(RTCx->DR, RTC_DR_WDU) >> RTC_DR_WDU_Pos);
1379}
1380
1402__STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month)
1403{
1404 MODIFY_REG(RTCx->DR, (RTC_DR_MT | RTC_DR_MU),
1405 (((Month & 0xF0U) << (RTC_DR_MT_Pos - 4U)) | ((Month & 0x0FU) << RTC_DR_MU_Pos)));
1406}
1407
1430__STATIC_INLINE uint32_t LL_RTC_DATE_GetMonth(RTC_TypeDef *RTCx)
1431{
1432 return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_MT | RTC_DR_MU))) >> RTC_DR_MU_Pos);
1433}
1434
1444__STATIC_INLINE void LL_RTC_DATE_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
1445{
1446 MODIFY_REG(RTCx->DR, (RTC_DR_DT | RTC_DR_DU),
1447 (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos)));
1448}
1449
1460__STATIC_INLINE uint32_t LL_RTC_DATE_GetDay(RTC_TypeDef *RTCx)
1461{
1462 return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_DT | RTC_DR_DU))) >> RTC_DR_DU_Pos);
1463}
1464
1500__STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uint32_t Day, uint32_t Month, uint32_t Year)
1501{
1502 uint32_t temp;
1503
1504 temp = ( WeekDay << RTC_DR_WDU_Pos) | \
1505 (((Year & 0xF0U) << (RTC_DR_YT_Pos - 4U)) | ((Year & 0x0FU) << RTC_DR_YU_Pos)) | \
1506 (((Month & 0xF0U) << (RTC_DR_MT_Pos - 4U)) | ((Month & 0x0FU) << RTC_DR_MU_Pos)) | \
1507 (((Day & 0xF0U) << (RTC_DR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_DR_DU_Pos));
1508
1509 MODIFY_REG(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU), temp);
1510}
1511
1528__STATIC_INLINE uint32_t LL_RTC_DATE_Get(RTC_TypeDef *RTCx)
1529{
1530 uint32_t temp;
1531
1532 temp = READ_BIT(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU));
1533
1534 return (uint32_t)((((temp & RTC_DR_WDU) >> RTC_DR_WDU_Pos) << RTC_OFFSET_WEEKDAY) | \
1535 (((temp & (RTC_DR_DT | RTC_DR_DU)) >> RTC_DR_DU_Pos) << RTC_OFFSET_DAY) | \
1536 (((temp & (RTC_DR_MT | RTC_DR_MU)) >> RTC_DR_MU_Pos) << RTC_OFFSET_MONTH) | \
1537 ((temp & (RTC_DR_YT | RTC_DR_YU)) >> RTC_DR_YU_Pos));
1538}
1539
1543
1547
1555__STATIC_INLINE void LL_RTC_ALMA_Enable(RTC_TypeDef *RTCx)
1556{
1557 SET_BIT(RTCx->CR, RTC_CR_ALRAE);
1558}
1559
1567__STATIC_INLINE void LL_RTC_ALMA_Disable(RTC_TypeDef *RTCx)
1568{
1569 CLEAR_BIT(RTCx->CR, RTC_CR_ALRAE);
1570}
1571
1588__STATIC_INLINE void LL_RTC_ALMA_SetMask(RTC_TypeDef *RTCx, uint32_t Mask)
1589{
1590 MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1, Mask);
1591}
1592
1608__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMask(RTC_TypeDef *RTCx)
1609{
1610 return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1));
1611}
1612
1619__STATIC_INLINE void LL_RTC_ALMA_EnableWeekday(RTC_TypeDef *RTCx)
1620{
1621 SET_BIT(RTCx->ALRMAR, RTC_ALRMAR_WDSEL);
1622}
1623
1630__STATIC_INLINE void LL_RTC_ALMA_DisableWeekday(RTC_TypeDef *RTCx)
1631{
1632 CLEAR_BIT(RTCx->ALRMAR, RTC_ALRMAR_WDSEL);
1633}
1634
1644__STATIC_INLINE void LL_RTC_ALMA_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
1645{
1646 MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_DT | RTC_ALRMAR_DU),
1647 (((Day & 0xF0U) << (RTC_ALRMAR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_ALRMAR_DU_Pos)));
1648}
1649
1658__STATIC_INLINE uint32_t LL_RTC_ALMA_GetDay(RTC_TypeDef *RTCx)
1659{
1660 return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_DT | RTC_ALRMAR_DU))) >> RTC_ALRMAR_DU_Pos);
1661}
1662
1677__STATIC_INLINE void LL_RTC_ALMA_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
1678{
1679 MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_DU, WeekDay << RTC_ALRMAR_DU_Pos);
1680}
1681
1695__STATIC_INLINE uint32_t LL_RTC_ALMA_GetWeekDay(RTC_TypeDef *RTCx)
1696{
1697 return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_DU) >> RTC_ALRMAR_DU_Pos);
1698}
1699
1709__STATIC_INLINE void LL_RTC_ALMA_SetTimeFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat)
1710{
1711 MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM, TimeFormat);
1712}
1713
1722__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTimeFormat(RTC_TypeDef *RTCx)
1723{
1724 return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_PM));
1725}
1726
1736__STATIC_INLINE void LL_RTC_ALMA_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
1737{
1738 MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU),
1739 (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos)));
1740}
1741
1750__STATIC_INLINE uint32_t LL_RTC_ALMA_GetHour(RTC_TypeDef *RTCx)
1751{
1752 return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU))) >> RTC_ALRMAR_HU_Pos);
1753}
1754
1764__STATIC_INLINE void LL_RTC_ALMA_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
1765{
1766 MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU),
1767 (((Minutes & 0xF0U) << (RTC_ALRMAR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMAR_MNU_Pos)));
1768}
1769
1778__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMinute(RTC_TypeDef *RTCx)
1779{
1780 return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU))) >> RTC_ALRMAR_MNU_Pos);
1781}
1782
1792__STATIC_INLINE void LL_RTC_ALMA_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
1793{
1794 MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_ST | RTC_ALRMAR_SU),
1795 (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos)));
1796}
1797
1806__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSecond(RTC_TypeDef *RTCx)
1807{
1808 return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_ST | RTC_ALRMAR_SU))) >> RTC_ALRMAR_SU_Pos);
1809}
1810
1829__STATIC_INLINE void LL_RTC_ALMA_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
1830{
1831 uint32_t temp;
1832
1833 temp = Format12_24 | \
1834 (((Hours & 0xF0U) << (RTC_ALRMAR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMAR_HU_Pos)) | \
1835 (((Minutes & 0xF0U) << (RTC_ALRMAR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMAR_MNU_Pos)) | \
1836 (((Seconds & 0xF0U) << (RTC_ALRMAR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMAR_SU_Pos));
1837
1838 MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM | RTC_ALRMAR_HT | RTC_ALRMAR_HU | RTC_ALRMAR_MNT | RTC_ALRMAR_MNU | RTC_ALRMAR_ST | RTC_ALRMAR_SU, temp);
1839}
1840
1854__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTime(RTC_TypeDef *RTCx)
1855{
1856 return (uint32_t)((LL_RTC_ALMA_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMA_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMA_GetSecond(RTCx));
1857}
1858
1869__STATIC_INLINE void LL_RTC_ALMA_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Mask)
1870{
1871 MODIFY_REG(RTCx->ALRMASSR, RTC_ALRMASSR_MASKSS, Mask << RTC_ALRMASSR_MASKSS_Pos);
1872}
1873
1880__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecondMask(RTC_TypeDef *RTCx)
1881{
1882 return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_MASKSS) >> RTC_ALRMASSR_MASKSS_Pos);
1883}
1884
1892__STATIC_INLINE void LL_RTC_ALMA_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsecond)
1893{
1894 MODIFY_REG(RTCx->ALRMASSR, RTC_ALRMASSR_SS, Subsecond);
1895}
1896
1903__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecond(RTC_TypeDef *RTCx)
1904{
1905 return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_SS));
1906}
1907
1911
1915
1923__STATIC_INLINE void LL_RTC_ALMB_Enable(RTC_TypeDef *RTCx)
1924{
1925 SET_BIT(RTCx->CR, RTC_CR_ALRBE);
1926}
1927
1935__STATIC_INLINE void LL_RTC_ALMB_Disable(RTC_TypeDef *RTCx)
1936{
1937 CLEAR_BIT(RTCx->CR, RTC_CR_ALRBE);
1938}
1939
1956__STATIC_INLINE void LL_RTC_ALMB_SetMask(RTC_TypeDef *RTCx, uint32_t Mask)
1957{
1958 MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1, Mask);
1959}
1960
1976__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMask(RTC_TypeDef *RTCx)
1977{
1978 return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1));
1979}
1980
1987__STATIC_INLINE void LL_RTC_ALMB_EnableWeekday(RTC_TypeDef *RTCx)
1988{
1989 SET_BIT(RTCx->ALRMBR, RTC_ALRMBR_WDSEL);
1990}
1991
1998__STATIC_INLINE void LL_RTC_ALMB_DisableWeekday(RTC_TypeDef *RTCx)
1999{
2000 CLEAR_BIT(RTCx->ALRMBR, RTC_ALRMBR_WDSEL);
2001}
2002
2012__STATIC_INLINE void LL_RTC_ALMB_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
2013{
2014 MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU),
2015 (((Day & 0xF0U) << (RTC_ALRMBR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_ALRMBR_DU_Pos)));
2016}
2017
2026__STATIC_INLINE uint32_t LL_RTC_ALMB_GetDay(RTC_TypeDef *RTCx)
2027{
2028 return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU))) >> RTC_ALRMBR_DU_Pos);
2029}
2030
2045__STATIC_INLINE void LL_RTC_ALMB_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
2046{
2047 MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_DU, WeekDay << RTC_ALRMBR_DU_Pos);
2048}
2049
2063__STATIC_INLINE uint32_t LL_RTC_ALMB_GetWeekDay(RTC_TypeDef *RTCx)
2064{
2065 return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_DU) >> RTC_ALRMBR_DU_Pos);
2066}
2067
2077__STATIC_INLINE void LL_RTC_ALMB_SetTimeFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat)
2078{
2079 MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM, TimeFormat);
2080}
2081
2090__STATIC_INLINE uint32_t LL_RTC_ALMB_GetTimeFormat(RTC_TypeDef *RTCx)
2091{
2092 return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_PM));
2093}
2094
2104__STATIC_INLINE void LL_RTC_ALMB_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
2105{
2106 MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_HT | RTC_ALRMBR_HU),
2107 (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos)));
2108}
2109
2118__STATIC_INLINE uint32_t LL_RTC_ALMB_GetHour(RTC_TypeDef *RTCx)
2119{
2120 return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_HT | RTC_ALRMBR_HU))) >> RTC_ALRMBR_HU_Pos);
2121}
2122
2132__STATIC_INLINE void LL_RTC_ALMB_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
2133{
2134 MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU),
2135 (((Minutes & 0xF0U) << (RTC_ALRMBR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMBR_MNU_Pos)));
2136}
2137
2146__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMinute(RTC_TypeDef *RTCx)
2147{
2148 return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU))) >> RTC_ALRMBR_MNU_Pos);
2149}
2150
2160__STATIC_INLINE void LL_RTC_ALMB_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
2161{
2162 MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU),
2163 (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos)));
2164}
2165
2174__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSecond(RTC_TypeDef *RTCx)
2175{
2176 return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU))) >> RTC_ALRMBR_SU_Pos);
2177}
2178
2197__STATIC_INLINE void LL_RTC_ALMB_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
2198{
2199 uint32_t temp;
2200
2201 temp = Format12_24 | \
2202 (((Hours & 0xF0U) << (RTC_ALRMBR_HT_Pos - 4U)) | ((Hours & 0x0FU) << RTC_ALRMBR_HU_Pos)) | \
2203 (((Minutes & 0xF0U) << (RTC_ALRMBR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMBR_MNU_Pos)) | \
2204 (((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos));
2205
2206 MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM | RTC_ALRMBR_HT | RTC_ALRMBR_HU | RTC_ALRMBR_MNT | RTC_ALRMBR_MNU | RTC_ALRMBR_ST | RTC_ALRMBR_SU, temp);
2207}
2208
2222__STATIC_INLINE uint32_t LL_RTC_ALMB_GetTime(RTC_TypeDef *RTCx)
2223{
2224 return (uint32_t)((LL_RTC_ALMB_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMB_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMB_GetSecond(RTCx));
2225}
2226
2237__STATIC_INLINE void LL_RTC_ALMB_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Mask)
2238{
2239 MODIFY_REG(RTCx->ALRMBSSR, RTC_ALRMBSSR_MASKSS, Mask << RTC_ALRMBSSR_MASKSS_Pos);
2240}
2241
2248__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecondMask(RTC_TypeDef *RTCx)
2249{
2250 return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_MASKSS) >> RTC_ALRMBSSR_MASKSS_Pos);
2251}
2252
2260__STATIC_INLINE void LL_RTC_ALMB_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsecond)
2261{
2262 MODIFY_REG(RTCx->ALRMBSSR, RTC_ALRMBSSR_SS, Subsecond);
2263}
2264
2271__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecond(RTC_TypeDef *RTCx)
2272{
2273 return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_SS));
2274}
2275
2279
2283
2291__STATIC_INLINE void LL_RTC_TS_Enable(RTC_TypeDef *RTCx)
2292{
2293 SET_BIT(RTCx->CR, RTC_CR_TSE);
2294}
2295
2303__STATIC_INLINE void LL_RTC_TS_Disable(RTC_TypeDef *RTCx)
2304{
2305 CLEAR_BIT(RTCx->CR, RTC_CR_TSE);
2306}
2307
2319__STATIC_INLINE void LL_RTC_TS_SetActiveEdge(RTC_TypeDef *RTCx, uint32_t Edge)
2320{
2321 MODIFY_REG(RTCx->CR, RTC_CR_TSEDGE, Edge);
2322}
2323
2333__STATIC_INLINE uint32_t LL_RTC_TS_GetActiveEdge(RTC_TypeDef *RTCx)
2334{
2335 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_TSEDGE));
2336}
2337
2346__STATIC_INLINE uint32_t LL_RTC_TS_GetTimeFormat(RTC_TypeDef *RTCx)
2347{
2348 return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_PM));
2349}
2350
2359__STATIC_INLINE uint32_t LL_RTC_TS_GetHour(RTC_TypeDef *RTCx)
2360{
2361 return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_HT | RTC_TSTR_HU) >> RTC_TSTR_HU_Pos);
2362}
2363
2372__STATIC_INLINE uint32_t LL_RTC_TS_GetMinute(RTC_TypeDef *RTCx)
2373{
2374 return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_MNT | RTC_TSTR_MNU) >> RTC_TSTR_MNU_Pos);
2375}
2376
2385__STATIC_INLINE uint32_t LL_RTC_TS_GetSecond(RTC_TypeDef *RTCx)
2386{
2387 return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_ST | RTC_TSTR_SU));
2388}
2389
2403__STATIC_INLINE uint32_t LL_RTC_TS_GetTime(RTC_TypeDef *RTCx)
2404{
2405 return (uint32_t)(READ_BIT(RTCx->TSTR,
2406 RTC_TSTR_HT | RTC_TSTR_HU | RTC_TSTR_MNT | RTC_TSTR_MNU | RTC_TSTR_ST | RTC_TSTR_SU));
2407}
2408
2422__STATIC_INLINE uint32_t LL_RTC_TS_GetWeekDay(RTC_TypeDef *RTCx)
2423{
2424 return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU) >> RTC_TSDR_WDU_Pos);
2425}
2426
2447__STATIC_INLINE uint32_t LL_RTC_TS_GetMonth(RTC_TypeDef *RTCx)
2448{
2449 return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_MT | RTC_TSDR_MU) >> RTC_TSDR_MU_Pos);
2450}
2451
2460__STATIC_INLINE uint32_t LL_RTC_TS_GetDay(RTC_TypeDef *RTCx)
2461{
2462 return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_DT | RTC_TSDR_DU));
2463}
2464
2477__STATIC_INLINE uint32_t LL_RTC_TS_GetDate(RTC_TypeDef *RTCx)
2478{
2479 return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU | RTC_TSDR_MT | RTC_TSDR_MU | RTC_TSDR_DT | RTC_TSDR_DU));
2480}
2481
2488__STATIC_INLINE uint32_t LL_RTC_TS_GetSubSecond(RTC_TypeDef *RTCx)
2489{
2490 return (uint32_t)(READ_BIT(RTCx->TSSSR, RTC_TSSSR_SS));
2491}
2492
2493#if defined(RTC_TAFCR_TAMPTS)
2500__STATIC_INLINE void LL_RTC_TS_EnableOnTamper(RTC_TypeDef *RTCx)
2501{
2502 SET_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPTS);
2503}
2504
2511__STATIC_INLINE void LL_RTC_TS_DisableOnTamper(RTC_TypeDef *RTCx)
2512{
2513 CLEAR_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPTS);
2514}
2515#endif /* RTC_TAFCR_TAMPTS */
2516
2529__STATIC_INLINE void LL_RTC_TS_SetPin(RTC_TypeDef *RTCx, uint32_t TSPin)
2530{
2531 MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TSINSEL, TSPin);
2532}
2533
2545__STATIC_INLINE uint32_t LL_RTC_TS_GetPin(RTC_TypeDef *RTCx)
2546{
2547 return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TSINSEL));
2548}
2549
2553
2557
2570__STATIC_INLINE void LL_RTC_TAMPER_Enable(RTC_TypeDef *RTCx, uint32_t Tamper)
2571{
2572 SET_BIT(RTCx->TAFCR, Tamper);
2573}
2574
2587__STATIC_INLINE void LL_RTC_TAMPER_Disable(RTC_TypeDef *RTCx, uint32_t Tamper)
2588{
2589 CLEAR_BIT(RTCx->TAFCR, Tamper);
2590}
2591
2598__STATIC_INLINE void LL_RTC_TAMPER_DisablePullUp(RTC_TypeDef *RTCx)
2599{
2600 SET_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPUDIS);
2601}
2602
2609__STATIC_INLINE void LL_RTC_TAMPER_EnablePullUp(RTC_TypeDef *RTCx)
2610{
2611 CLEAR_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPUDIS);
2612}
2613
2625__STATIC_INLINE void LL_RTC_TAMPER_SetPrecharge(RTC_TypeDef *RTCx, uint32_t Duration)
2626{
2627 MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TAMPPRCH, Duration);
2628}
2629
2640__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPrecharge(RTC_TypeDef *RTCx)
2641{
2642 return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPPRCH));
2643}
2644
2656__STATIC_INLINE void LL_RTC_TAMPER_SetFilterCount(RTC_TypeDef *RTCx, uint32_t FilterCount)
2657{
2658 MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TAMPFLT, FilterCount);
2659}
2660
2671__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetFilterCount(RTC_TypeDef *RTCx)
2672{
2673 return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPFLT));
2674}
2675
2691__STATIC_INLINE void LL_RTC_TAMPER_SetSamplingFreq(RTC_TypeDef *RTCx, uint32_t SamplingFreq)
2692{
2693 MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TAMPFREQ, SamplingFreq);
2694}
2695
2710__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef *RTCx)
2711{
2712 return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPFREQ));
2713}
2714
2727__STATIC_INLINE void LL_RTC_TAMPER_EnableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
2728{
2729 SET_BIT(RTCx->TAFCR, Tamper);
2730}
2731
2744__STATIC_INLINE void LL_RTC_TAMPER_DisableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
2745{
2746 CLEAR_BIT(RTCx->TAFCR, Tamper);
2747}
2748
2761__STATIC_INLINE void LL_RTC_TAMPER_SetPin(RTC_TypeDef *RTCx, uint32_t TamperPin)
2762{
2763 MODIFY_REG(RTCx->TAFCR, RTC_TAFCR_TAMP1INSEL, TamperPin);
2764}
2765
2777
2778__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPin(RTC_TypeDef *RTCx)
2779{
2780 return (uint32_t)(READ_BIT(RTCx->TAFCR, RTC_TAFCR_TAMP1INSEL));
2781}
2782
2786
2790
2798__STATIC_INLINE void LL_RTC_WAKEUP_Enable(RTC_TypeDef *RTCx)
2799{
2800 SET_BIT(RTCx->CR, RTC_CR_WUTE);
2801}
2802
2810__STATIC_INLINE void LL_RTC_WAKEUP_Disable(RTC_TypeDef *RTCx)
2811{
2812 CLEAR_BIT(RTCx->CR, RTC_CR_WUTE);
2813}
2814
2821__STATIC_INLINE uint32_t LL_RTC_WAKEUP_IsEnabled(RTC_TypeDef *RTCx)
2822{
2823 return ((READ_BIT(RTCx->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) ? 1UL : 0UL);
2824}
2825
2841__STATIC_INLINE void LL_RTC_WAKEUP_SetClock(RTC_TypeDef *RTCx, uint32_t WakeupClock)
2842{
2843 MODIFY_REG(RTCx->CR, RTC_CR_WUCKSEL, WakeupClock);
2844}
2845
2858__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetClock(RTC_TypeDef *RTCx)
2859{
2860 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_WUCKSEL));
2861}
2862
2871__STATIC_INLINE void LL_RTC_WAKEUP_SetAutoReload(RTC_TypeDef *RTCx, uint32_t Value)
2872{
2873 MODIFY_REG(RTCx->WUTR, RTC_WUTR_WUT, Value);
2874}
2875
2882__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetAutoReload(RTC_TypeDef *RTCx)
2883{
2884 return (uint32_t)(READ_BIT(RTCx->WUTR, RTC_WUTR_WUT));
2885}
2886
2890
2894
2923__STATIC_INLINE void LL_RTC_BAK_SetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister, uint32_t Data)
2924{
2925 uint32_t temp;
2926
2927 temp = (uint32_t)(&(RTCx->BKP0R));
2928 temp += (BackupRegister * 4U);
2929
2930 /* Write the specified register */
2931 *(__IO uint32_t *)temp = (uint32_t)Data;
2932}
2933
2961__STATIC_INLINE uint32_t LL_RTC_BAK_GetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister)
2962{
2963 uint32_t temp;
2964
2965 temp = (uint32_t)(&(RTCx->BKP0R));
2966 temp += (BackupRegister * 4U);
2967
2968 /* Read the specified register */
2969 return (*(__IO uint32_t *)temp);
2970}
2971
2975
2979
2993__STATIC_INLINE void LL_RTC_CAL_SetOutputFreq(RTC_TypeDef *RTCx, uint32_t Frequency)
2994{
2995 MODIFY_REG(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL, Frequency);
2996}
2997
3009__STATIC_INLINE uint32_t LL_RTC_CAL_GetOutputFreq(RTC_TypeDef *RTCx)
3010{
3011 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL));
3012}
3013
3022__STATIC_INLINE void LL_RTC_CAL_EnableCoarseDigital(RTC_TypeDef *RTCx)
3023{
3024 SET_BIT(RTCx->CR, RTC_CR_DCE);
3025}
3026
3035__STATIC_INLINE void LL_RTC_CAL_DisableCoarseDigital(RTC_TypeDef *RTCx)
3036{
3037 CLEAR_BIT(RTCx->CR, RTC_CR_DCE);
3038}
3039
3055__STATIC_INLINE void LL_RTC_CAL_ConfigCoarseDigital(RTC_TypeDef *RTCx, uint32_t Sign, uint32_t Value)
3056{
3057 MODIFY_REG(RTCx->CALIBR, RTC_CALIBR_DCS | RTC_CALIBR_DC, Sign | Value);
3058}
3059
3066__STATIC_INLINE uint32_t LL_RTC_CAL_GetCoarseDigitalValue(RTC_TypeDef *RTCx)
3067{
3068 return (uint32_t)(READ_BIT(RTCx->CALIBR, RTC_CALIBR_DC));
3069}
3070
3079__STATIC_INLINE uint32_t LL_RTC_CAL_GetCoarseDigitalSign(RTC_TypeDef *RTCx)
3080{
3081 return (uint32_t)(READ_BIT(RTCx->CALIBR, RTC_CALIBR_DCS));
3082}
3083
3095__STATIC_INLINE void LL_RTC_CAL_SetPulse(RTC_TypeDef *RTCx, uint32_t Pulse)
3096{
3097 MODIFY_REG(RTCx->CALR, RTC_CALR_CALP, Pulse);
3098}
3099
3106__STATIC_INLINE uint32_t LL_RTC_CAL_IsPulseInserted(RTC_TypeDef *RTCx)
3107{
3108 return ((READ_BIT(RTCx->CALR, RTC_CALR_CALP) == (RTC_CALR_CALP)) ? 1UL : 0UL);
3109}
3110
3124__STATIC_INLINE void LL_RTC_CAL_SetPeriod(RTC_TypeDef *RTCx, uint32_t Period)
3125{
3126 MODIFY_REG(RTCx->CALR, RTC_CALR_CALW8 | RTC_CALR_CALW16, Period);
3127}
3128
3139__STATIC_INLINE uint32_t LL_RTC_CAL_GetPeriod(RTC_TypeDef *RTCx)
3140{
3141 return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALW8 | RTC_CALR_CALW16));
3142}
3143
3153__STATIC_INLINE void LL_RTC_CAL_SetMinus(RTC_TypeDef *RTCx, uint32_t CalibMinus)
3154{
3155 MODIFY_REG(RTCx->CALR, RTC_CALR_CALM, CalibMinus);
3156}
3157
3164__STATIC_INLINE uint32_t LL_RTC_CAL_GetMinus(RTC_TypeDef *RTCx)
3165{
3166 return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALM));
3167}
3168
3172
3176
3183__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RECALP(RTC_TypeDef *RTCx)
3184{
3185 return ((READ_BIT(RTCx->ISR, RTC_ISR_RECALPF) == (RTC_ISR_RECALPF)) ? 1UL : 0UL);
3186}
3187
3188#if defined(RTC_TAMPER2_SUPPORT)
3195__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2(RTC_TypeDef *RTCx)
3196{
3197 return ((READ_BIT(RTCx->ISR, RTC_ISR_TAMP2F) == (RTC_ISR_TAMP2F)) ? 1UL : 0UL);
3198}
3199#endif /* RTC_TAMPER2_SUPPORT */
3200
3207__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1(RTC_TypeDef *RTCx)
3208{
3209 return ((READ_BIT(RTCx->ISR, RTC_ISR_TAMP1F) == (RTC_ISR_TAMP1F)) ? 1UL : 0UL);
3210}
3211
3218__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOV(RTC_TypeDef *RTCx)
3219{
3220 return ((READ_BIT(RTCx->ISR, RTC_ISR_TSOVF) == (RTC_ISR_TSOVF)) ? 1UL : 0UL);
3221}
3222
3229__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TS(RTC_TypeDef *RTCx)
3230{
3231 return ((READ_BIT(RTCx->ISR, RTC_ISR_TSF) == (RTC_ISR_TSF)) ? 1UL : 0UL);
3232}
3233
3240__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUT(RTC_TypeDef *RTCx)
3241{
3242 return ((READ_BIT(RTCx->ISR, RTC_ISR_WUTF) == (RTC_ISR_WUTF)) ? 1UL : 0UL);
3243}
3244
3251__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRB(RTC_TypeDef *RTCx)
3252{
3253 return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRBF) == (RTC_ISR_ALRBF)) ? 1UL : 0UL);
3254}
3255
3262__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRA(RTC_TypeDef *RTCx)
3263{
3264 return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRAF) == (RTC_ISR_ALRAF)) ? 1UL : 0UL);
3265}
3266
3267#if defined(RTC_TAMPER2_SUPPORT)
3274__STATIC_INLINE void LL_RTC_ClearFlag_TAMP2(RTC_TypeDef *RTCx)
3275{
3276 WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP2F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3277}
3278#endif /* RTC_TAMPER2_SUPPORT */
3279
3286__STATIC_INLINE void LL_RTC_ClearFlag_TAMP1(RTC_TypeDef *RTCx)
3287{
3288 WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP1F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3289}
3290
3297__STATIC_INLINE void LL_RTC_ClearFlag_TSOV(RTC_TypeDef *RTCx)
3298{
3299 WRITE_REG(RTCx->ISR, (~((RTC_ISR_TSOVF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3300}
3301
3308__STATIC_INLINE void LL_RTC_ClearFlag_TS(RTC_TypeDef *RTCx)
3309{
3310 WRITE_REG(RTCx->ISR, (~((RTC_ISR_TSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3311}
3312
3319__STATIC_INLINE void LL_RTC_ClearFlag_WUT(RTC_TypeDef *RTCx)
3320{
3321 WRITE_REG(RTCx->ISR, (~((RTC_ISR_WUTF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3322}
3323
3330__STATIC_INLINE void LL_RTC_ClearFlag_ALRB(RTC_TypeDef *RTCx)
3331{
3332 WRITE_REG(RTCx->ISR, (~((RTC_ISR_ALRBF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3333}
3334
3341__STATIC_INLINE void LL_RTC_ClearFlag_ALRA(RTC_TypeDef *RTCx)
3342{
3343 WRITE_REG(RTCx->ISR, (~((RTC_ISR_ALRAF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3344}
3345
3352__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INIT(RTC_TypeDef *RTCx)
3353{
3354 return ((READ_BIT(RTCx->ISR, RTC_ISR_INITF) == (RTC_ISR_INITF)) ? 1UL : 0UL);
3355}
3356
3363__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx)
3364{
3365 return ((READ_BIT(RTCx->ISR, RTC_ISR_RSF) == (RTC_ISR_RSF)) ? 1UL : 0UL);
3366}
3367
3374__STATIC_INLINE void LL_RTC_ClearFlag_RS(RTC_TypeDef *RTCx)
3375{
3376 WRITE_REG(RTCx->ISR, (~((RTC_ISR_RSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
3377}
3378
3385__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INITS(RTC_TypeDef *RTCx)
3386{
3387 return ((READ_BIT(RTCx->ISR, RTC_ISR_INITS) == (RTC_ISR_INITS)) ? 1UL : 0UL);
3388}
3389
3396__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SHP(RTC_TypeDef *RTCx)
3397{
3398 return ((READ_BIT(RTCx->ISR, RTC_ISR_SHPF) == (RTC_ISR_SHPF)) ? 1UL : 0UL);
3399}
3400
3407__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef *RTCx)
3408{
3409 return ((READ_BIT(RTCx->ISR, RTC_ISR_WUTWF) == (RTC_ISR_WUTWF)) ? 1UL : 0UL);
3410}
3411
3418__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBW(RTC_TypeDef *RTCx)
3419{
3420 return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRBWF) == (RTC_ISR_ALRBWF)) ? 1UL : 0UL);
3421}
3422
3429__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAW(RTC_TypeDef *RTCx)
3430{
3431 return ((READ_BIT(RTCx->ISR, RTC_ISR_ALRAWF) == (RTC_ISR_ALRAWF)) ? 1UL : 0UL);
3432}
3433
3437
3441
3449__STATIC_INLINE void LL_RTC_EnableIT_TS(RTC_TypeDef *RTCx)
3450{
3451 SET_BIT(RTCx->CR, RTC_CR_TSIE);
3452}
3453
3461__STATIC_INLINE void LL_RTC_DisableIT_TS(RTC_TypeDef *RTCx)
3462{
3463 CLEAR_BIT(RTCx->CR, RTC_CR_TSIE);
3464}
3465
3473__STATIC_INLINE void LL_RTC_EnableIT_WUT(RTC_TypeDef *RTCx)
3474{
3475 SET_BIT(RTCx->CR, RTC_CR_WUTIE);
3476}
3477
3485__STATIC_INLINE void LL_RTC_DisableIT_WUT(RTC_TypeDef *RTCx)
3486{
3487 CLEAR_BIT(RTCx->CR, RTC_CR_WUTIE);
3488}
3489
3497__STATIC_INLINE void LL_RTC_EnableIT_ALRB(RTC_TypeDef *RTCx)
3498{
3499 SET_BIT(RTCx->CR, RTC_CR_ALRBIE);
3500}
3501
3509__STATIC_INLINE void LL_RTC_DisableIT_ALRB(RTC_TypeDef *RTCx)
3510{
3511 CLEAR_BIT(RTCx->CR, RTC_CR_ALRBIE);
3512}
3513
3521__STATIC_INLINE void LL_RTC_EnableIT_ALRA(RTC_TypeDef *RTCx)
3522{
3523 SET_BIT(RTCx->CR, RTC_CR_ALRAIE);
3524}
3525
3533__STATIC_INLINE void LL_RTC_DisableIT_ALRA(RTC_TypeDef *RTCx)
3534{
3535 CLEAR_BIT(RTCx->CR, RTC_CR_ALRAIE);
3536}
3537
3544__STATIC_INLINE void LL_RTC_EnableIT_TAMP(RTC_TypeDef *RTCx)
3545{
3546 SET_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPIE);
3547}
3548
3555__STATIC_INLINE void LL_RTC_DisableIT_TAMP(RTC_TypeDef *RTCx)
3556{
3557 CLEAR_BIT(RTCx->TAFCR, RTC_TAFCR_TAMPIE);
3558}
3559
3566__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TS(RTC_TypeDef *RTCx)
3567{
3568 return ((READ_BIT(RTCx->CR, RTC_CR_TSIE) == (RTC_CR_TSIE)) ? 1UL : 0UL);
3569}
3570
3577__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_WUT(RTC_TypeDef *RTCx)
3578{
3579 return ((READ_BIT(RTCx->CR, RTC_CR_WUTIE) == (RTC_CR_WUTIE)) ? 1UL : 0UL);
3580}
3581
3588__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRB(RTC_TypeDef *RTCx)
3589{
3590 return ((READ_BIT(RTCx->CR, RTC_CR_ALRBIE) == (RTC_CR_ALRBIE)) ? 1UL : 0UL);
3591}
3592
3599__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef *RTCx)
3600{
3601 return ((READ_BIT(RTCx->CR, RTC_CR_ALRAIE) == (RTC_CR_ALRAIE)) ? 1UL : 0UL);
3602}
3603
3610__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(RTC_TypeDef *RTCx)
3611{
3612 return ((READ_BIT(RTCx->TAFCR,
3613 RTC_TAFCR_TAMPIE) == (RTC_TAFCR_TAMPIE)) ? 1UL : 0UL);
3614}
3615
3619
3620#if defined(USE_FULL_LL_DRIVER)
3624
3625ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx);
3626ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct);
3627void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct);
3628ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct);
3629void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct);
3630ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_DateTypeDef *RTC_DateStruct);
3631void LL_RTC_DATE_StructInit(LL_RTC_DateTypeDef *RTC_DateStruct);
3632ErrorStatus LL_RTC_ALMA_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
3633ErrorStatus LL_RTC_ALMB_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
3634void LL_RTC_ALMA_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
3635void LL_RTC_ALMB_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
3636ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx);
3637ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx);
3638ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx);
3639
3643#endif /* USE_FULL_LL_DRIVER */
3644
3648
3652
3653#endif /* defined(RTC) */
3654
3658
3659#ifdef __cplusplus
3660}
3661#endif
3662
3663#endif /* STM32F4xx_LL_RTC_H */
#define RTC_INIT_MASK