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STM32CubeF4 HAL / LL Drivers API Reference
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stm32f4xx_ll_lptim.h
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1
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32F4xx_LL_LPTIM_H
21#define STM32F4xx_LL_LPTIM_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32f4xx.h"
29
33
34#if defined (LPTIM1)
35
39
40/* Private types -------------------------------------------------------------*/
41/* Private variables ---------------------------------------------------------*/
42
43/* Private constants ---------------------------------------------------------*/
44
45/* Private macros ------------------------------------------------------------*/
46#if defined(USE_FULL_LL_DRIVER)
53#endif /*USE_FULL_LL_DRIVER*/
54
55/* Exported types ------------------------------------------------------------*/
56#if defined(USE_FULL_LL_DRIVER)
60
64typedef struct
65{
66 uint32_t ClockSource;
71
72 uint32_t Prescaler;
77
78 uint32_t Waveform;
83
84 uint32_t Polarity;
89} LL_LPTIM_InitTypeDef;
90
94#endif /* USE_FULL_LL_DRIVER */
95
96/* Exported constants --------------------------------------------------------*/
100
105#define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM
106#define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK
107#define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM
108#define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG
109#define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK
110#define LL_LPTIM_ISR_UP LPTIM_ISR_UP
111#define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN
115
120#define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE
121#define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE
122#define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE
123#define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE
124#define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE
125#define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE
126#define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE
130
134#define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT
135#define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT
139
143#define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U
144#define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
148
152#define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U
153#define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE
157
161#define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U
162#define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE
166
170#define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U
171#define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL
175
179#define LL_LPTIM_PRESCALER_DIV1 0x00000000U
180#define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
181#define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
182#define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0)
183#define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
184#define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0)
185#define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1)
186#define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC
190
194#define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U
195#define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0
196#define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1
197#define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0)
198#define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2
199#define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0)
203
207#define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U
208#define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0
209#define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1
210#define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT
214
218#define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0
219#define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1
220#define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN
224
228#define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U
229#define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL
233
237#define LL_LPTIM_CLK_FILTER_NONE 0x00000000U
238#define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0
239#define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1
240#define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT
244
248#define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U
249#define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0
250#define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
254
258#define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U
259#define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0
260#define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1
264
268#define LL_LPTIM_INPUT1_SRC_PAD_AF 0x00000000U
269#define LL_LPTIM_INPUT1_SRC_PAD_PA4 LPTIM_OR_OR_0
270#define LL_LPTIM_INPUT1_SRC_PAD_PB9 LPTIM_OR_OR_1
271#define LL_LPTIM_INPUT1_SRC_TIM_DAC LPTIM_OR_OR
275
279
280/* Exported macro ------------------------------------------------------------*/
284
288
296#define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
297
304#define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
308
312
313/* Exported functions --------------------------------------------------------*/
317
321#define LL_LPTIM_ClearFLAG_CMPM LL_LPTIM_ClearFlag_CMPM
322#define LL_LPTIM_ClearFLAG_CC1 LL_LPTIM_ClearFlag_CC1
323#define LL_LPTIM_ClearFLAG_CC2 LL_LPTIM_ClearFlag_CC2
324#define LL_LPTIM_ClearFLAG_CC1O LL_LPTIM_ClearFlag_CC1O
325#define LL_LPTIM_ClearFLAG_CC2O LL_LPTIM_ClearFlag_CC2O
326#define LL_LPTIM_ClearFLAG_ARRM LL_LPTIM_ClearFlag_ARRM
330
331#if defined(USE_FULL_LL_DRIVER)
335
336ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx);
337void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
338ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
339void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
343#endif /* USE_FULL_LL_DRIVER */
344
348
357__STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
358{
359 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
360}
361
368__STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
369{
370 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
371}
372
386__STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
387{
388 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
389}
390
401__STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
402{
403 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
404}
405
414__STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
415{
416 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
417}
418
432__STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
433{
434 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
435}
436
443__STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
444{
445 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
446}
447
459__STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
460{
461 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
462}
463
470__STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
471{
472 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
473}
474
485__STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
486{
487 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
488}
489
500__STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
501{
502 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
503}
504
513__STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
514{
515 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
516}
517
535__STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
536{
537 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
538}
539
549__STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
550{
551 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
552}
553
562__STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
563{
564 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
565}
566
576__STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
577{
578 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
579}
580
589__STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
590{
591 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
592}
593
614__STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
615{
616 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
617}
618
633__STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
634{
635 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
636}
637
649__STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
650{
651 MODIFY_REG(LPTIMx->OR, LPTIM_OR_OR, Src);
652}
653
657
661
674__STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
675{
676 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
677}
678
688__STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
689{
690 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
691}
692
699__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
700{
701 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
702}
703
711__STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
712{
713 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
714}
715
743__STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
744{
745 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
746}
747
760__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
761{
762 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
763}
764
775__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
776{
777 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
778}
779
789__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
790{
791 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
792}
793
797
801
812__STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
813{
814 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
815}
816
825__STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
826{
827 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
828}
829
853__STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
854{
855 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
856}
857
867__STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
868{
869 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
870}
871
882__STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
883{
884 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
885}
886
890
894
906__STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
907{
908 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
909}
910
920__STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
921{
922 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
923}
924
936__STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
937{
938 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
939}
940
948__STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
949{
950 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
951}
952
959__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
960{
961 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
962}
963
967
971
972
979__STATIC_INLINE void LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef *LPTIMx)
980{
981 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
982}
983
990__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
991{
992 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
993}
994
1001__STATIC_INLINE void LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef *LPTIMx)
1002{
1003 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
1004}
1005
1012__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
1013{
1014 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
1015}
1016
1023__STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1024{
1025 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1026}
1027
1034__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1035{
1036 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1037}
1038
1045__STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1046{
1047 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1048}
1049
1057__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1058{
1059 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1060}
1061
1068__STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1069{
1070 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1071}
1072
1080__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1081{
1082 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1083}
1084
1091__STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1092{
1093 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1094}
1095
1103__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1104{
1105 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1106}
1107
1114__STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1115{
1116 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1117}
1118
1126__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1127{
1128 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1129}
1130
1134
1138
1145__STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1146{
1147 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1148}
1149
1156__STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1157{
1158 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1159}
1160
1167__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1168{
1169 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1170}
1171
1178__STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1179{
1180 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1181}
1182
1189__STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1190{
1191 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1192}
1193
1200__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1201{
1202 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1203}
1204
1211__STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1212{
1213 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1214}
1215
1222__STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1223{
1224 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1225}
1226
1233__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1234{
1235 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1236}
1237
1244__STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1245{
1246 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1247}
1248
1255__STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1256{
1257 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1258}
1259
1266__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1267{
1268 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1269}
1270
1277__STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1278{
1279 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1280}
1281
1288__STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1289{
1290 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1291}
1292
1299__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1300{
1301 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1302}
1303
1310__STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1311{
1312 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1313}
1314
1321__STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1322{
1323 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1324}
1325
1332__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1333{
1334 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1335}
1336
1343__STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1344{
1345 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1346}
1347
1354__STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1355{
1356 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1357}
1358
1365__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1366{
1367 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1368}
1369
1373
1377
1381
1382#endif /* LPTIM1 */
1383
1387
1388#ifdef __cplusplus
1389}
1390#endif
1391
1392#endif /* STM32F4xx_LL_LPTIM_H */