STM32F4xx HAL Driver master
STM32CubeF4 HAL / LL Drivers API Reference
Loading...
Searching...
No Matches
stm32f4xx_ll_gpio.h
Go to the documentation of this file.
1
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef __STM32F4xx_LL_GPIO_H
21#define __STM32F4xx_LL_GPIO_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32f4xx.h"
29
33
34#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK)
35
39
40/* Private types -------------------------------------------------------------*/
41/* Private variables ---------------------------------------------------------*/
42/* Private constants ---------------------------------------------------------*/
43/* Private macros ------------------------------------------------------------*/
44#if defined(USE_FULL_LL_DRIVER)
48
52#endif /*USE_FULL_LL_DRIVER*/
53
54/* Exported types ------------------------------------------------------------*/
55#if defined(USE_FULL_LL_DRIVER)
59
63typedef struct
64{
65 uint32_t Pin;
67
68 uint32_t Mode;
72
73 uint32_t Speed;
77
78 uint32_t OutputType;
82
83 uint32_t Pull;
87
88 uint32_t Alternate;
92} LL_GPIO_InitTypeDef;
93
97#endif /* USE_FULL_LL_DRIVER */
98
99/* Exported constants --------------------------------------------------------*/
103
107#define LL_GPIO_PIN_0 GPIO_BSRR_BS_0
108#define LL_GPIO_PIN_1 GPIO_BSRR_BS_1
109#define LL_GPIO_PIN_2 GPIO_BSRR_BS_2
110#define LL_GPIO_PIN_3 GPIO_BSRR_BS_3
111#define LL_GPIO_PIN_4 GPIO_BSRR_BS_4
112#define LL_GPIO_PIN_5 GPIO_BSRR_BS_5
113#define LL_GPIO_PIN_6 GPIO_BSRR_BS_6
114#define LL_GPIO_PIN_7 GPIO_BSRR_BS_7
115#define LL_GPIO_PIN_8 GPIO_BSRR_BS_8
116#define LL_GPIO_PIN_9 GPIO_BSRR_BS_9
117#define LL_GPIO_PIN_10 GPIO_BSRR_BS_10
118#define LL_GPIO_PIN_11 GPIO_BSRR_BS_11
119#define LL_GPIO_PIN_12 GPIO_BSRR_BS_12
120#define LL_GPIO_PIN_13 GPIO_BSRR_BS_13
121#define LL_GPIO_PIN_14 GPIO_BSRR_BS_14
122#define LL_GPIO_PIN_15 GPIO_BSRR_BS_15
123#define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
124 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
125 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
126 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
127 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
128 GPIO_BSRR_BS_15)
132
136#define LL_GPIO_MODE_INPUT (0x00000000U)
137#define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0
138#define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1
139#define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0
143
147#define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U)
148#define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0
152
156#define LL_GPIO_SPEED_FREQ_LOW (0x00000000U)
157#define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0
158#define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0_1
159#define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEEDR0
163
167#define LL_GPIO_PULL_NO (0x00000000U)
168#define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0
169#define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1
173
177#define LL_GPIO_AF_0 (0x0000000U)
178#define LL_GPIO_AF_1 (0x0000001U)
179#define LL_GPIO_AF_2 (0x0000002U)
180#define LL_GPIO_AF_3 (0x0000003U)
181#define LL_GPIO_AF_4 (0x0000004U)
182#define LL_GPIO_AF_5 (0x0000005U)
183#define LL_GPIO_AF_6 (0x0000006U)
184#define LL_GPIO_AF_7 (0x0000007U)
185#define LL_GPIO_AF_8 (0x0000008U)
186#define LL_GPIO_AF_9 (0x0000009U)
187#define LL_GPIO_AF_10 (0x000000AU)
188#define LL_GPIO_AF_11 (0x000000BU)
189#define LL_GPIO_AF_12 (0x000000CU)
190#define LL_GPIO_AF_13 (0x000000DU)
191#define LL_GPIO_AF_14 (0x000000EU)
192#define LL_GPIO_AF_15 (0x000000FU)
196
200
201/* Exported macro ------------------------------------------------------------*/
205
209
217#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
218
225#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
229
233
234/* Exported functions --------------------------------------------------------*/
238
242
273__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
274{
275 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
276}
277
307__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
308{
309 return (uint32_t)(READ_BIT(GPIOx->MODER,
310 (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
311}
312
342__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
343{
344 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
345}
346
376__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
377{
378 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
379}
380
413__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
414{
415 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
416 (Speed << (POSITION_VAL(Pin) * 2U)));
417}
418
450__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
451{
452 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
453 (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
454}
455
484__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
485{
486 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
487}
488
516__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
517{
518 return (uint32_t)(READ_BIT(GPIOx->PUPDR,
519 (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
520}
521
556__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
557{
558 MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)),
559 (Alternate << (POSITION_VAL(Pin) * 4U)));
560}
561
593__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
594{
595 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
596 (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
597}
598
633__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
634{
635 MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)),
636 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
637}
638
671__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
672{
673 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
674 (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
675}
676
677
707__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
708{
709 __IO uint32_t temp;
710 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
711 WRITE_REG(GPIOx->LCKR, PinMask);
712 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
713 temp = READ_REG(GPIOx->LCKR);
714 (void) temp;
715}
716
741__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
742{
743 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
744}
745
752__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
753{
754 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
755}
756
760
764
771__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
772{
773 return (uint32_t)(READ_REG(GPIOx->IDR));
774}
775
800__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
801{
802 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
803}
804
812__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
813{
814 WRITE_REG(GPIOx->ODR, PortValue);
815}
816
823__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
824{
825 return (uint32_t)(READ_REG(GPIOx->ODR));
826}
827
852__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
853{
854 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
855}
856
881__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
882{
883 WRITE_REG(GPIOx->BSRR, PinMask);
884}
885
910__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
911{
912 WRITE_REG(GPIOx->BSRR, (PinMask << 16));
913}
914
939__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
940{
941 uint32_t odr = READ_REG(GPIOx->ODR);
942 WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
943}
944
948
949#if defined(USE_FULL_LL_DRIVER)
953
954ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
955ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
956void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
957
961#endif /* USE_FULL_LL_DRIVER */
962
966
970
971#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK) */
975
976#ifdef __cplusplus
977}
978#endif
979
980#endif /* __STM32F4xx_LL_GPIO_H */
981