STM32F4xx HAL Driver master
STM32CubeF4 HAL / LL Drivers API Reference
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stm32f4xx_hal_usart.c
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1
198
199/* Includes ------------------------------------------------------------------*/
200#include "stm32f4xx_hal.h"
201
205
210#ifdef HAL_USART_MODULE_ENABLED
211/* Private typedef -----------------------------------------------------------*/
212/* Private define ------------------------------------------------------------*/
216#define DUMMY_DATA 0xFFFFU
217#define USART_TIMEOUT_VALUE 22000U
221/* Private macro -------------------------------------------------------------*/
222/* Private variables ---------------------------------------------------------*/
223/* Private function prototypes -----------------------------------------------*/
224/* Private functions ---------------------------------------------------------*/
228#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
229void USART_InitCallbacksToDefault(USART_HandleTypeDef *husart);
230#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
231static void USART_EndTxTransfer(USART_HandleTypeDef *husart);
232static void USART_EndRxTransfer(USART_HandleTypeDef *husart);
233static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
234static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
235static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
236static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
237static void USART_SetConfig(USART_HandleTypeDef *husart);
238static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
239static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
240static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
241static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
242static void USART_DMAError(DMA_HandleTypeDef *hdma);
243static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
244static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
245static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
246
247static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status,
248 uint32_t Tickstart, uint32_t Timeout);
252
253/* Exported functions --------------------------------------------------------*/
257
292
301{
302 /* Check the USART handle allocation */
303 if (husart == NULL)
304 {
305 return HAL_ERROR;
306 }
307
308 /* Check the parameters */
309 assert_param(IS_USART_INSTANCE(husart->Instance));
310
311 if (husart->State == HAL_USART_STATE_RESET)
312 {
313 /* Allocate lock resource and initialize it */
314 husart->Lock = HAL_UNLOCKED;
315
316#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
317 USART_InitCallbacksToDefault(husart);
318
319 if (husart->MspInitCallback == NULL)
320 {
321 husart->MspInitCallback = HAL_USART_MspInit;
322 }
323
324 /* Init the low level hardware */
325 husart->MspInitCallback(husart);
326#else
327 /* Init the low level hardware : GPIO, CLOCK */
328 HAL_USART_MspInit(husart);
329#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
330 }
331
332 husart->State = HAL_USART_STATE_BUSY;
333
334 /* Set the USART Communication parameters */
335 USART_SetConfig(husart);
336
337 /* In USART mode, the following bits must be kept cleared:
338 - LINEN bit in the USART_CR2 register
339 - HDSEL, SCEN and IREN bits in the USART_CR3 register */
340 CLEAR_BIT(husart->Instance->CR2, USART_CR2_LINEN);
341 CLEAR_BIT(husart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
342
343 /* Enable the Peripheral */
344 __HAL_USART_ENABLE(husart);
345
346 /* Initialize the USART state */
349
350 return HAL_OK;
351}
352
360{
361 /* Check the USART handle allocation */
362 if (husart == NULL)
363 {
364 return HAL_ERROR;
365 }
366
367 /* Check the parameters */
368 assert_param(IS_USART_INSTANCE(husart->Instance));
369
370 husart->State = HAL_USART_STATE_BUSY;
371
372 /* Disable the Peripheral */
373 __HAL_USART_DISABLE(husart);
374
375#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
376 if (husart->MspDeInitCallback == NULL)
377 {
378 husart->MspDeInitCallback = HAL_USART_MspDeInit;
379 }
380 /* DeInit the low level hardware */
381 husart->MspDeInitCallback(husart);
382#else
383 /* DeInit the low level hardware */
384 HAL_USART_MspDeInit(husart);
385#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
386
389
390 /* Release Lock */
391 __HAL_UNLOCK(husart);
392
393 return HAL_OK;
394}
395
402__weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
403{
404 /* Prevent unused argument(s) compilation warning */
405 UNUSED(husart);
406 /* NOTE: This function should not be modified, when the callback is needed,
407 the HAL_USART_MspInit could be implemented in the user file
408 */
409}
410
417__weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
418{
419 /* Prevent unused argument(s) compilation warning */
420 UNUSED(husart);
421 /* NOTE: This function should not be modified, when the callback is needed,
422 the HAL_USART_MspDeInit could be implemented in the user file
423 */
424}
425
426#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
447HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID,
448 pUSART_CallbackTypeDef pCallback)
449{
450 HAL_StatusTypeDef status = HAL_OK;
451
452 if (pCallback == NULL)
453 {
454 /* Update the error code */
455 husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
456
457 return HAL_ERROR;
458 }
459
460 if (husart->State == HAL_USART_STATE_READY)
461 {
462 switch (CallbackID)
463 {
464 case HAL_USART_TX_HALFCOMPLETE_CB_ID :
465 husart->TxHalfCpltCallback = pCallback;
466 break;
467
468 case HAL_USART_TX_COMPLETE_CB_ID :
469 husart->TxCpltCallback = pCallback;
470 break;
471
472 case HAL_USART_RX_HALFCOMPLETE_CB_ID :
473 husart->RxHalfCpltCallback = pCallback;
474 break;
475
476 case HAL_USART_RX_COMPLETE_CB_ID :
477 husart->RxCpltCallback = pCallback;
478 break;
479
480 case HAL_USART_TX_RX_COMPLETE_CB_ID :
481 husart->TxRxCpltCallback = pCallback;
482 break;
483
484 case HAL_USART_ERROR_CB_ID :
485 husart->ErrorCallback = pCallback;
486 break;
487
488 case HAL_USART_ABORT_COMPLETE_CB_ID :
489 husart->AbortCpltCallback = pCallback;
490 break;
491
492 case HAL_USART_MSPINIT_CB_ID :
493 husart->MspInitCallback = pCallback;
494 break;
495
496 case HAL_USART_MSPDEINIT_CB_ID :
497 husart->MspDeInitCallback = pCallback;
498 break;
499
500 default :
501 /* Update the error code */
502 husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
503
504 /* Return error status */
505 status = HAL_ERROR;
506 break;
507 }
508 }
509 else if (husart->State == HAL_USART_STATE_RESET)
510 {
511 switch (CallbackID)
512 {
513 case HAL_USART_MSPINIT_CB_ID :
514 husart->MspInitCallback = pCallback;
515 break;
516
517 case HAL_USART_MSPDEINIT_CB_ID :
518 husart->MspDeInitCallback = pCallback;
519 break;
520
521 default :
522 /* Update the error code */
523 husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
524
525 /* Return error status */
526 status = HAL_ERROR;
527 break;
528 }
529 }
530 else
531 {
532 /* Update the error code */
533 husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
534
535 /* Return error status */
536 status = HAL_ERROR;
537 }
538
539 return status;
540}
541
561HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID)
562{
563 HAL_StatusTypeDef status = HAL_OK;
564
565 if (husart->State == HAL_USART_STATE_READY)
566 {
567 switch (CallbackID)
568 {
569 case HAL_USART_TX_HALFCOMPLETE_CB_ID :
570 husart->TxHalfCpltCallback = HAL_USART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
571 break;
572
573 case HAL_USART_TX_COMPLETE_CB_ID :
574 husart->TxCpltCallback = HAL_USART_TxCpltCallback; /* Legacy weak TxCpltCallback */
575 break;
576
577 case HAL_USART_RX_HALFCOMPLETE_CB_ID :
578 husart->RxHalfCpltCallback = HAL_USART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
579 break;
580
581 case HAL_USART_RX_COMPLETE_CB_ID :
582 husart->RxCpltCallback = HAL_USART_RxCpltCallback; /* Legacy weak RxCpltCallback */
583 break;
584
585 case HAL_USART_TX_RX_COMPLETE_CB_ID :
586 husart->TxRxCpltCallback = HAL_USART_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */
587 break;
588
589 case HAL_USART_ERROR_CB_ID :
590 husart->ErrorCallback = HAL_USART_ErrorCallback; /* Legacy weak ErrorCallback */
591 break;
592
593 case HAL_USART_ABORT_COMPLETE_CB_ID :
594 husart->AbortCpltCallback = HAL_USART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
595 break;
596
597 case HAL_USART_MSPINIT_CB_ID :
598 husart->MspInitCallback = HAL_USART_MspInit; /* Legacy weak MspInitCallback */
599 break;
600
601 case HAL_USART_MSPDEINIT_CB_ID :
602 husart->MspDeInitCallback = HAL_USART_MspDeInit; /* Legacy weak MspDeInitCallback */
603 break;
604
605 default :
606 /* Update the error code */
607 husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
608
609 /* Return error status */
610 status = HAL_ERROR;
611 break;
612 }
613 }
614 else if (husart->State == HAL_USART_STATE_RESET)
615 {
616 switch (CallbackID)
617 {
618 case HAL_USART_MSPINIT_CB_ID :
619 husart->MspInitCallback = HAL_USART_MspInit;
620 break;
621
622 case HAL_USART_MSPDEINIT_CB_ID :
623 husart->MspDeInitCallback = HAL_USART_MspDeInit;
624 break;
625
626 default :
627 /* Update the error code */
628 husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
629
630 /* Return error status */
631 status = HAL_ERROR;
632 break;
633 }
634 }
635 else
636 {
637 /* Update the error code */
638 husart->ErrorCode |= HAL_USART_ERROR_INVALID_CALLBACK;
639
640 /* Return error status */
641 status = HAL_ERROR;
642 }
643
644 return status;
645}
646#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
647
651
730
743HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
744{
745 const uint8_t *ptxdata8bits;
746 const uint16_t *ptxdata16bits;
747 uint32_t tickstart;
748
749 if (husart->State == HAL_USART_STATE_READY)
750 {
751 if ((pTxData == NULL) || (Size == 0))
752 {
753 return HAL_ERROR;
754 }
755
756 /* Process Locked */
757 __HAL_LOCK(husart);
758
761
762 /* Init tickstart for timeout management */
763 tickstart = HAL_GetTick();
764
765 husart->TxXferSize = Size;
766 husart->TxXferCount = Size;
767
768 /* In case of 9bits/No Parity transfer, pTxData needs to be handled as a uint16_t pointer */
769 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
770 {
771 ptxdata8bits = NULL;
772 ptxdata16bits = (const uint16_t *) pTxData;
773 }
774 else
775 {
776 ptxdata8bits = pTxData;
777 ptxdata16bits = NULL;
778 }
779
780 while (husart->TxXferCount > 0U)
781 {
782 /* Wait for TXE flag in order to write data in DR */
783 if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
784 {
785 return HAL_TIMEOUT;
786 }
787 if (ptxdata8bits == NULL)
788 {
789 husart->Instance->DR = (uint16_t)(*ptxdata16bits & (uint16_t)0x01FF);
790 ptxdata16bits++;
791 }
792 else
793 {
794 husart->Instance->DR = (uint8_t)(*ptxdata8bits & (uint8_t)0xFF);
795 ptxdata8bits++;
796 }
797
798 husart->TxXferCount--;
799 }
800
801 if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
802 {
803 return HAL_TIMEOUT;
804 }
805
807
808 /* Process Unlocked */
809 __HAL_UNLOCK(husart);
810
811 return HAL_OK;
812 }
813 else
814 {
815 return HAL_BUSY;
816 }
817}
818
832HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
833{
834 uint8_t *prxdata8bits;
835 uint16_t *prxdata16bits;
836 uint32_t tickstart;
837
838 if (husart->State == HAL_USART_STATE_READY)
839 {
840 if ((pRxData == NULL) || (Size == 0))
841 {
842 return HAL_ERROR;
843 }
844 /* Process Locked */
845 __HAL_LOCK(husart);
846
849
850 /* Init tickstart for timeout management */
851 tickstart = HAL_GetTick();
852
853 husart->RxXferSize = Size;
854 husart->RxXferCount = Size;
855
856 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
857 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
858 {
859 prxdata8bits = NULL;
860 prxdata16bits = (uint16_t *) pRxData;
861 }
862 else
863 {
864 prxdata8bits = pRxData;
865 prxdata16bits = NULL;
866 }
867
868 /* Check the remain data to be received */
869 while (husart->RxXferCount > 0U)
870 {
871 /* Wait until TXE flag is set to send dummy byte in order to generate the
872 * clock for the slave to send data.
873 * Whatever the frame length (7, 8 or 9-bit long), the same dummy value
874 * can be written for all the cases. */
875 if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
876 {
877 return HAL_TIMEOUT;
878 }
879 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x0FF);
880
881 /* Wait until RXNE flag is set to receive the byte */
882 if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
883 {
884 return HAL_TIMEOUT;
885 }
886
887 if (prxdata8bits == NULL)
888 {
889 *prxdata16bits = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
890 prxdata16bits++;
891 }
892 else
893 {
894 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) || ((husart->Init.WordLength == USART_WORDLENGTH_8B) && (husart->Init.Parity == USART_PARITY_NONE)))
895 {
896 *prxdata8bits = (uint8_t)(husart->Instance->DR & (uint8_t)0x0FF);
897 }
898 else
899 {
900 *prxdata8bits = (uint8_t)(husart->Instance->DR & (uint8_t)0x07F);
901 }
902 prxdata8bits++;
903 }
904 husart->RxXferCount--;
905 }
906
908
909 /* Process Unlocked */
910 __HAL_UNLOCK(husart);
911
912 return HAL_OK;
913 }
914 else
915 {
916 return HAL_BUSY;
917 }
918}
919
933HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
934 uint16_t Size, uint32_t Timeout)
935{
936 uint8_t *prxdata8bits;
937 uint16_t *prxdata16bits;
938 const uint8_t *ptxdata8bits;
939 const uint16_t *ptxdata16bits;
940 uint16_t rxdatacount;
941 uint32_t tickstart;
942
943 if (husart->State == HAL_USART_STATE_READY)
944 {
945 if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
946 {
947 return HAL_ERROR;
948 }
949
950 /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input parameter
951 should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be
952 handled through a u16 cast. */
953 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
954 {
955 if (((((uint32_t)pTxData) & 1U) != 0U) || ((((uint32_t)pRxData) & 1U) != 0U))
956 {
957 return HAL_ERROR;
958 }
959 }
960 /* Process Locked */
961 __HAL_LOCK(husart);
962
965
966 /* Init tickstart for timeout management */
967 tickstart = HAL_GetTick();
968
969 husart->RxXferSize = Size;
970 husart->TxXferSize = Size;
971 husart->TxXferCount = Size;
972 husart->RxXferCount = Size;
973
974 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
975 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
976 {
977 prxdata8bits = NULL;
978 ptxdata8bits = NULL;
979 ptxdata16bits = (const uint16_t *) pTxData;
980 prxdata16bits = (uint16_t *) pRxData;
981 }
982 else
983 {
984 prxdata8bits = pRxData;
985 ptxdata8bits = pTxData;
986 ptxdata16bits = NULL;
987 prxdata16bits = NULL;
988 }
989
990 /* Check the remain data to be received */
991 /* rxdatacount is a temporary variable for MISRAC2012-Rule-13.5 */
992 rxdatacount = husart->RxXferCount;
993 while ((husart->TxXferCount > 0U) || (rxdatacount > 0U))
994 {
995 if (husart->TxXferCount > 0U)
996 {
997 /* Wait for TXE flag in order to write data in DR */
998 if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
999 {
1000 return HAL_TIMEOUT;
1001 }
1002
1003 if (ptxdata8bits == NULL)
1004 {
1005 husart->Instance->DR = (uint16_t)(*ptxdata16bits & (uint16_t)0x01FF);
1006 ptxdata16bits++;
1007 }
1008 else
1009 {
1010 husart->Instance->DR = (uint8_t)(*ptxdata8bits & (uint8_t)0xFF);
1011 ptxdata8bits++;
1012 }
1013
1014 husart->TxXferCount--;
1015 }
1016
1017 if (husart->RxXferCount > 0U)
1018 {
1019 /* Wait for RXNE Flag */
1020 if (USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1021 {
1022 return HAL_TIMEOUT;
1023 }
1024 if (prxdata8bits == NULL)
1025 {
1026 *prxdata16bits = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
1027 prxdata16bits++;
1028 }
1029 else
1030 {
1031 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) || ((husart->Init.WordLength == USART_WORDLENGTH_8B) && (husart->Init.Parity == USART_PARITY_NONE)))
1032 {
1033 *prxdata8bits = (uint8_t)(husart->Instance->DR & (uint8_t)0x0FF);
1034 }
1035 else
1036 {
1037 *prxdata8bits = (uint8_t)(husart->Instance->DR & (uint8_t)0x07F);
1038 }
1039
1040 prxdata8bits++;
1041 }
1042
1043 husart->RxXferCount--;
1044 }
1045 rxdatacount = husart->RxXferCount;
1046 }
1047
1048 husart->State = HAL_USART_STATE_READY;
1049
1050 /* Process Unlocked */
1051 __HAL_UNLOCK(husart);
1052
1053 return HAL_OK;
1054 }
1055 else
1056 {
1057 return HAL_BUSY;
1058 }
1059}
1060
1073HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size)
1074{
1075 if (husart->State == HAL_USART_STATE_READY)
1076 {
1077 if ((pTxData == NULL) || (Size == 0))
1078 {
1079 return HAL_ERROR;
1080 }
1081
1082 /* Process Locked */
1083 __HAL_LOCK(husart);
1084
1085 husart->pTxBuffPtr = pTxData;
1086 husart->TxXferSize = Size;
1087 husart->TxXferCount = Size;
1088
1091
1092 /* The USART Error Interrupts: (Frame error, Noise error, Overrun error)
1093 are not managed by the USART transmit process to avoid the overrun interrupt
1094 when the USART mode is configured for transmit and receive "USART_MODE_TX_RX"
1095 to benefit for the frame error and noise interrupts the USART mode should be
1096 configured only for transmit "USART_MODE_TX"
1097 The __HAL_USART_ENABLE_IT(husart, USART_IT_ERR) can be used to enable the Frame error,
1098 Noise error interrupt */
1099
1100 /* Process Unlocked */
1101 __HAL_UNLOCK(husart);
1102
1103 /* Enable the USART Transmit Data Register Empty Interrupt */
1104 SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
1105
1106 return HAL_OK;
1107 }
1108 else
1109 {
1110 return HAL_BUSY;
1111 }
1112}
1113
1126HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
1127{
1128 if (husart->State == HAL_USART_STATE_READY)
1129 {
1130 if ((pRxData == NULL) || (Size == 0))
1131 {
1132 return HAL_ERROR;
1133 }
1134 /* Process Locked */
1135 __HAL_LOCK(husart);
1136
1137 husart->pRxBuffPtr = pRxData;
1138 husart->RxXferSize = Size;
1139 husart->RxXferCount = Size;
1140
1143
1144 /* Process Unlocked */
1145 __HAL_UNLOCK(husart);
1146
1147 if (husart->Init.Parity != USART_PARITY_NONE)
1148 {
1149 /* Enable the USART Parity Error and Data Register not empty Interrupts */
1150 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
1151 }
1152 else
1153 {
1154 /* Enable the USART Data Register not empty Interrupts */
1155 SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
1156 }
1157
1158 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1159 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1160
1161 /* Send dummy byte in order to generate the clock for the slave to send data */
1162 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FF);
1163
1164 return HAL_OK;
1165 }
1166 else
1167 {
1168 return HAL_BUSY;
1169 }
1170}
1171
1184HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1185 uint16_t Size)
1186{
1187 if (husart->State == HAL_USART_STATE_READY)
1188 {
1189 if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
1190 {
1191 return HAL_ERROR;
1192 }
1193 /* Process Locked */
1194 __HAL_LOCK(husart);
1195
1196 husart->pRxBuffPtr = pRxData;
1197 husart->RxXferSize = Size;
1198 husart->RxXferCount = Size;
1199 husart->pTxBuffPtr = pTxData;
1200 husart->TxXferSize = Size;
1201 husart->TxXferCount = Size;
1202
1205
1206 /* Process Unlocked */
1207 __HAL_UNLOCK(husart);
1208
1209 /* Enable the USART Data Register not empty Interrupt */
1210 SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
1211
1212 if (husart->Init.Parity != USART_PARITY_NONE)
1213 {
1214 /* Enable the USART Parity Error Interrupt */
1215 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1216 }
1217
1218 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1219 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1220
1221 /* Enable the USART Transmit Data Register Empty Interrupt */
1222 SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
1223
1224 return HAL_OK;
1225 }
1226 else
1227 {
1228 return HAL_BUSY;
1229 }
1230}
1231
1243HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size)
1244{
1245 HAL_StatusTypeDef status = HAL_OK;
1246 const uint32_t *tmp;
1247
1248 if (husart->State == HAL_USART_STATE_READY)
1249 {
1250 if ((pTxData == NULL) || (Size == 0))
1251 {
1252 return HAL_ERROR;
1253 }
1254 /* Process Locked */
1255 __HAL_LOCK(husart);
1256
1257 husart->pTxBuffPtr = pTxData;
1258 husart->TxXferSize = Size;
1259 husart->TxXferCount = Size;
1260
1263
1264 /* Set the USART DMA transfer complete callback */
1265 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
1266
1267 /* Set the USART DMA Half transfer complete callback */
1268 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
1269
1270 /* Set the DMA error callback */
1271 husart->hdmatx->XferErrorCallback = USART_DMAError;
1272
1273 /* Set the DMA abort callback */
1274 husart->hdmatx->XferAbortCallback = NULL;
1275
1276 /* Enable the USART transmit DMA stream */
1277 tmp = (const uint32_t *)&pTxData;
1278 status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size);
1279 if (status == HAL_OK)
1280 {
1281 /* Clear the TC flag in the SR register by writing 0 to it */
1283
1284 /* Process Unlocked */
1285 __HAL_UNLOCK(husart);
1286
1287 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1288 in the USART CR3 register */
1289 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1290
1291 return HAL_OK;
1292 }
1293 else
1294 {
1295 /* Set error code to DMA */
1297
1298 /* Process Unlocked */
1299 __HAL_UNLOCK(husart);
1300
1301 /* Restore husart->State to ready */
1302 husart->State = HAL_USART_STATE_READY;
1303
1304 return HAL_ERROR;
1305 }
1306 }
1307 else
1308 {
1309 return HAL_BUSY;
1310 }
1311}
1312
1326HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
1327{
1328 HAL_StatusTypeDef status = HAL_OK;
1329 uint32_t *tmp;
1330
1331 if (husart->State == HAL_USART_STATE_READY)
1332 {
1333 if ((pRxData == NULL) || (Size == 0))
1334 {
1335 return HAL_ERROR;
1336 }
1337
1338 /* Process Locked */
1339 __HAL_LOCK(husart);
1340
1341 husart->pRxBuffPtr = pRxData;
1342 husart->RxXferSize = Size;
1343 husart->pTxBuffPtr = pRxData;
1344 husart->TxXferSize = Size;
1345
1348
1349 /* Set the USART DMA Rx transfer complete callback */
1350 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
1351
1352 /* Set the USART DMA Half transfer complete callback */
1353 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
1354
1355 /* Set the USART DMA Rx transfer error callback */
1356 husart->hdmarx->XferErrorCallback = USART_DMAError;
1357
1358 /* Set the DMA abort callback */
1359 husart->hdmarx->XferAbortCallback = NULL;
1360
1361 /* Set the USART Tx DMA transfer complete callback as NULL because the communication closing
1362 is performed in DMA reception complete callback */
1363 husart->hdmatx->XferHalfCpltCallback = NULL;
1364 husart->hdmatx->XferCpltCallback = NULL;
1365
1366 /* Set the DMA error callback */
1367 husart->hdmatx->XferErrorCallback = USART_DMAError;
1368
1369 /* Set the DMA AbortCpltCallback */
1370 husart->hdmatx->XferAbortCallback = NULL;
1371
1372 /* Enable the USART receive DMA stream */
1373 tmp = (uint32_t *)&pRxData;
1374 status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(uint32_t *)tmp, Size);
1375
1376 if (status == HAL_OK)
1377 {
1378 /* Enable the USART transmit DMA stream: the transmit stream is used in order
1379 to generate in the non-blocking mode the clock to the slave device,
1380 this mode isn't a simplex receive mode but a full-duplex receive one */
1381 status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size);
1382 }
1383
1384 if (status == HAL_OK)
1385 {
1386 /* Clear the Overrun flag just before enabling the DMA Rx request: mandatory for the second transfer */
1388
1389 /* Process Unlocked */
1390 __HAL_UNLOCK(husart);
1391
1392 if (husart->Init.Parity != USART_PARITY_NONE)
1393 {
1394 /* Enable the USART Parity Error Interrupt */
1395 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1396 }
1397
1398 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1399 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1400
1401 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
1402 in the USART CR3 register */
1403 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1404
1405 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1406 in the USART CR3 register */
1407 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1408
1409 return HAL_OK;
1410 }
1411 else
1412 {
1413 /* Set error code to DMA */
1415
1416 /* Process Unlocked */
1417 __HAL_UNLOCK(husart);
1418
1419 /* Restore husart->State to ready */
1420 husart->State = HAL_USART_STATE_READY;
1421
1422 return HAL_ERROR;
1423 }
1424 }
1425 else
1426 {
1427 return HAL_BUSY;
1428 }
1429}
1430
1444HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
1445 uint16_t Size)
1446{
1447 HAL_StatusTypeDef status;
1448 const uint32_t *tmp;
1449
1450 if (husart->State == HAL_USART_STATE_READY)
1451 {
1452 if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
1453 {
1454 return HAL_ERROR;
1455 }
1456 /* Process Locked */
1457 __HAL_LOCK(husart);
1458
1459 husart->pRxBuffPtr = pRxData;
1460 husart->RxXferSize = Size;
1461 husart->pTxBuffPtr = pTxData;
1462 husart->TxXferSize = Size;
1463
1466
1467 /* Set the USART DMA Rx transfer complete callback */
1468 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
1469
1470 /* Set the USART DMA Half transfer complete callback */
1471 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
1472
1473 /* Set the USART DMA Tx transfer complete callback */
1474 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
1475
1476 /* Set the USART DMA Half transfer complete callback */
1477 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
1478
1479 /* Set the USART DMA Tx transfer error callback */
1480 husart->hdmatx->XferErrorCallback = USART_DMAError;
1481
1482 /* Set the USART DMA Rx transfer error callback */
1483 husart->hdmarx->XferErrorCallback = USART_DMAError;
1484
1485 /* Set the DMA abort callback */
1486 husart->hdmarx->XferAbortCallback = NULL;
1487
1488 /* Enable the USART receive DMA stream */
1489 tmp = (uint32_t *)&pRxData;
1490 status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(const uint32_t *)tmp, Size);
1491
1492 /* Enable the USART transmit DMA stream */
1493 if (status == HAL_OK)
1494 {
1495 tmp = (const uint32_t *)&pTxData;
1496 status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->DR, Size);
1497 }
1498 else
1499 {
1500 status = HAL_ERROR;
1501 }
1502 if (status == HAL_OK)
1503 {
1504 /* Clear the TC flag in the SR register by writing 0 to it */
1506
1507 /* Clear the Overrun flag: mandatory for the second transfer in circular mode */
1509
1510 /* Process Unlocked */
1511 __HAL_UNLOCK(husart);
1512
1513 if (husart->Init.Parity != USART_PARITY_NONE)
1514 {
1515 /* Enable the USART Parity Error Interrupt */
1516 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
1517 }
1518
1519 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
1520 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
1521
1522 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
1523 in the USART CR3 register */
1524 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1525
1526 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1527 in the USART CR3 register */
1528 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1529
1530 return HAL_OK;
1531 }
1532 else
1533 {
1534 /* Set error code to DMA */
1536
1537 /* Process Unlocked */
1538 __HAL_UNLOCK(husart);
1539
1540 /* Restore husart->State to ready */
1541 husart->State = HAL_USART_STATE_READY;
1542
1543 return HAL_ERROR;
1544 }
1545 }
1546 else
1547 {
1548 return HAL_BUSY;
1549 }
1550}
1551
1559{
1560 /* Process Locked */
1561 __HAL_LOCK(husart);
1562
1563 /* Disable the USART DMA Tx request */
1564 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1565
1566 /* Process Unlocked */
1567 __HAL_UNLOCK(husart);
1568
1569 return HAL_OK;
1570}
1571
1579{
1580 /* Process Locked */
1581 __HAL_LOCK(husart);
1582
1583 /* Enable the USART DMA Tx request */
1584 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1585
1586 /* Process Unlocked */
1587 __HAL_UNLOCK(husart);
1588
1589 return HAL_OK;
1590}
1591
1599{
1600 uint32_t dmarequest = 0x00U;
1601 /* The Lock is not implemented on this API to allow the user application
1602 to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback():
1603 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
1604 and the correspond call back is executed HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback()
1605 */
1606
1607 /* Stop USART DMA Tx request if ongoing */
1608 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
1609 if ((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
1610 {
1611 USART_EndTxTransfer(husart);
1612
1613 /* Abort the USART DMA Tx channel */
1614 if (husart->hdmatx != NULL)
1615 {
1616 HAL_DMA_Abort(husart->hdmatx);
1617 }
1618
1619 /* Disable the USART Tx DMA request */
1620 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1621 }
1622
1623 /* Stop USART DMA Rx request if ongoing */
1624 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
1625 if ((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
1626 {
1627 USART_EndRxTransfer(husart);
1628
1629 /* Abort the USART DMA Rx channel */
1630 if (husart->hdmarx != NULL)
1631 {
1632 HAL_DMA_Abort(husart->hdmarx);
1633 }
1634
1635 /* Disable the USART Rx DMA request */
1636 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1637 }
1638
1639 return HAL_OK;
1640}
1641
1656{
1657 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1658 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1659 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
1660
1661 /* Disable the USART DMA Tx request if enabled */
1662 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
1663 {
1664 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1665
1666 /* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */
1667 if (husart->hdmatx != NULL)
1668 {
1669 /* Set the USART DMA Abort callback to Null.
1670 No call back execution at end of DMA abort procedure */
1671 husart->hdmatx->XferAbortCallback = NULL;
1672
1673 HAL_DMA_Abort(husart->hdmatx);
1674 }
1675 }
1676
1677 /* Disable the USART DMA Rx request if enabled */
1678 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
1679 {
1680 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1681
1682 /* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */
1683 if (husart->hdmarx != NULL)
1684 {
1685 /* Set the USART DMA Abort callback to Null.
1686 No call back execution at end of DMA abort procedure */
1687 husart->hdmarx->XferAbortCallback = NULL;
1688
1689 HAL_DMA_Abort(husart->hdmarx);
1690 }
1691 }
1692
1693 /* Reset Tx and Rx transfer counters */
1694 husart->TxXferCount = 0x00U;
1695 husart->RxXferCount = 0x00U;
1696
1697 /* Restore husart->State to Ready */
1698 husart->State = HAL_USART_STATE_READY;
1699
1700 /* Reset Handle ErrorCode to No Error */
1702
1703 return HAL_OK;
1704}
1705
1722{
1723 uint32_t AbortCplt = 0x01U;
1724
1725 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1726 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1727 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
1728
1729 /* If DMA Tx and/or DMA Rx Handles are associated to USART Handle, DMA Abort complete callbacks should be initialised
1730 before any call to DMA Abort functions */
1731 /* DMA Tx Handle is valid */
1732 if (husart->hdmatx != NULL)
1733 {
1734 /* Set DMA Abort Complete callback if USART DMA Tx request if enabled.
1735 Otherwise, set it to NULL */
1736 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
1737 {
1738 husart->hdmatx->XferAbortCallback = USART_DMATxAbortCallback;
1739 }
1740 else
1741 {
1742 husart->hdmatx->XferAbortCallback = NULL;
1743 }
1744 }
1745 /* DMA Rx Handle is valid */
1746 if (husart->hdmarx != NULL)
1747 {
1748 /* Set DMA Abort Complete callback if USART DMA Rx request if enabled.
1749 Otherwise, set it to NULL */
1750 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
1751 {
1752 husart->hdmarx->XferAbortCallback = USART_DMARxAbortCallback;
1753 }
1754 else
1755 {
1756 husart->hdmarx->XferAbortCallback = NULL;
1757 }
1758 }
1759
1760 /* Disable the USART DMA Tx request if enabled */
1761 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
1762 {
1763 /* Disable DMA Tx at USART level */
1764 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
1765
1766 /* Abort the USART DMA Tx channel : use non blocking DMA Abort API (callback) */
1767 if (husart->hdmatx != NULL)
1768 {
1769 /* USART Tx DMA Abort callback has already been initialised :
1770 will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
1771
1772 /* Abort DMA TX */
1773 if (HAL_DMA_Abort_IT(husart->hdmatx) != HAL_OK)
1774 {
1775 husart->hdmatx->XferAbortCallback = NULL;
1776 }
1777 else
1778 {
1779 AbortCplt = 0x00U;
1780 }
1781 }
1782 }
1783
1784 /* Disable the USART DMA Rx request if enabled */
1785 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
1786 {
1787 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1788
1789 /* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */
1790 if (husart->hdmarx != NULL)
1791 {
1792 /* USART Rx DMA Abort callback has already been initialised :
1793 will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
1794
1795 /* Abort DMA RX */
1796 if (HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
1797 {
1798 husart->hdmarx->XferAbortCallback = NULL;
1799 AbortCplt = 0x01U;
1800 }
1801 else
1802 {
1803 AbortCplt = 0x00U;
1804 }
1805 }
1806 }
1807
1808 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
1809 if (AbortCplt == 0x01U)
1810 {
1811 /* Reset Tx and Rx transfer counters */
1812 husart->TxXferCount = 0x00U;
1813 husart->RxXferCount = 0x00U;
1814
1815 /* Reset errorCode */
1817
1818 /* Restore husart->State to Ready */
1819 husart->State = HAL_USART_STATE_READY;
1820
1821 /* As no DMA to be aborted, call directly user Abort complete callback */
1822#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
1823 /* Call registered Abort Complete Callback */
1824 husart->AbortCpltCallback(husart);
1825#else
1826 /* Call legacy weak Abort Complete Callback */
1828#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
1829 }
1830
1831 return HAL_OK;
1832}
1833
1841{
1842 uint32_t isrflags = READ_REG(husart->Instance->SR);
1843 uint32_t cr1its = READ_REG(husart->Instance->CR1);
1844 uint32_t cr3its = READ_REG(husart->Instance->CR3);
1845 uint32_t errorflags = 0x00U;
1846 uint32_t dmarequest = 0x00U;
1847
1848 /* If no error occurs */
1849 errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
1850 if (errorflags == RESET)
1851 {
1852 /* USART in mode Receiver -------------------------------------------------*/
1853 if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
1854 {
1855 if (husart->State == HAL_USART_STATE_BUSY_RX)
1856 {
1857 USART_Receive_IT(husart);
1858 }
1859 else
1860 {
1861 USART_TransmitReceive_IT(husart);
1862 }
1863 return;
1864 }
1865 }
1866 /* If some errors occur */
1867 if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
1868 {
1869 /* USART parity error interrupt occurred ----------------------------------*/
1870 if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
1871 {
1872 husart->ErrorCode |= HAL_USART_ERROR_PE;
1873 }
1874
1875 /* USART noise error interrupt occurred --------------------------------*/
1876 if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
1877 {
1878 husart->ErrorCode |= HAL_USART_ERROR_NE;
1879 }
1880
1881 /* USART frame error interrupt occurred --------------------------------*/
1882 if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
1883 {
1884 husart->ErrorCode |= HAL_USART_ERROR_FE;
1885 }
1886
1887 /* USART Over-Run interrupt occurred -----------------------------------*/
1888 if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
1889 {
1890 husart->ErrorCode |= HAL_USART_ERROR_ORE;
1891 }
1892
1893 if (husart->ErrorCode != HAL_USART_ERROR_NONE)
1894 {
1895 /* USART in mode Receiver -----------------------------------------------*/
1896 if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
1897 {
1898 if (husart->State == HAL_USART_STATE_BUSY_RX)
1899 {
1900 USART_Receive_IT(husart);
1901 }
1902 else
1903 {
1904 USART_TransmitReceive_IT(husart);
1905 }
1906 }
1907 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
1908 consider error as blocking */
1909 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
1910 if (((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) || dmarequest)
1911 {
1912 /* Set the USART state ready to be able to start again the process,
1913 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
1914 USART_EndRxTransfer(husart);
1915
1916 /* Disable the USART DMA Rx request if enabled */
1917 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
1918 {
1919 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
1920
1921 /* Abort the USART DMA Rx channel */
1922 if (husart->hdmarx != NULL)
1923 {
1924 /* Set the USART DMA Abort callback :
1925 will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
1926 husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
1927
1928 if (HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
1929 {
1930 /* Call Directly XferAbortCallback function in case of error */
1931 husart->hdmarx->XferAbortCallback(husart->hdmarx);
1932 }
1933 }
1934 else
1935 {
1936 /* Call user error callback */
1937#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
1938 /* Call registered Error Callback */
1939 husart->ErrorCallback(husart);
1940#else
1941 /* Call legacy weak Error Callback */
1943#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
1944 }
1945 }
1946 else
1947 {
1948 /* Call user error callback */
1949#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
1950 /* Call registered Error Callback */
1951 husart->ErrorCallback(husart);
1952#else
1953 /* Call legacy weak Error Callback */
1955#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
1956 }
1957 }
1958 else
1959 {
1960 /* Call user error callback */
1961#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
1962 /* Call registered Error Callback */
1963 husart->ErrorCallback(husart);
1964#else
1965 /* Call legacy weak Error Callback */
1967#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
1969 }
1970 }
1971 return;
1972 }
1973
1974 /* USART in mode Transmitter -----------------------------------------------*/
1975 if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
1976 {
1977 if (husart->State == HAL_USART_STATE_BUSY_TX)
1978 {
1979 USART_Transmit_IT(husart);
1980 }
1981 else
1982 {
1983 USART_TransmitReceive_IT(husart);
1984 }
1985 return;
1986 }
1987
1988 /* USART in mode Transmitter (transmission end) ----------------------------*/
1989 if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
1990 {
1991 USART_EndTransmit_IT(husart);
1992 return;
1993 }
1994}
1995
2003{
2004 /* Prevent unused argument(s) compilation warning */
2005 UNUSED(husart);
2006 /* NOTE: This function should not be modified, when the callback is needed,
2007 the HAL_USART_TxCpltCallback could be implemented in the user file
2008 */
2009}
2010
2018{
2019 /* Prevent unused argument(s) compilation warning */
2020 UNUSED(husart);
2021 /* NOTE: This function should not be modified, when the callback is needed,
2022 the HAL_USART_TxHalfCpltCallback could be implemented in the user file
2023 */
2024}
2025
2033{
2034 /* Prevent unused argument(s) compilation warning */
2035 UNUSED(husart);
2036 /* NOTE: This function should not be modified, when the callback is needed,
2037 the HAL_USART_RxCpltCallback could be implemented in the user file
2038 */
2039}
2040
2048{
2049 /* Prevent unused argument(s) compilation warning */
2050 UNUSED(husart);
2051 /* NOTE: This function should not be modified, when the callback is needed,
2052 the HAL_USART_RxHalfCpltCallback could be implemented in the user file
2053 */
2054}
2055
2063{
2064 /* Prevent unused argument(s) compilation warning */
2065 UNUSED(husart);
2066 /* NOTE: This function should not be modified, when the callback is needed,
2067 the HAL_USART_TxRxCpltCallback could be implemented in the user file
2068 */
2069}
2070
2078{
2079 /* Prevent unused argument(s) compilation warning */
2080 UNUSED(husart);
2081 /* NOTE: This function should not be modified, when the callback is needed,
2082 the HAL_USART_ErrorCallback could be implemented in the user file
2083 */
2084}
2085
2092{
2093 /* Prevent unused argument(s) compilation warning */
2094 UNUSED(husart);
2095
2096 /* NOTE : This function should not be modified, when the callback is needed,
2097 the HAL_USART_AbortCpltCallback can be implemented in the user file.
2098 */
2099}
2100
2104
2123
2131{
2132 return husart->State;
2133}
2134
2141uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart)
2142{
2143 return husart->ErrorCode;
2144}
2145
2152
2156
2162#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2163void USART_InitCallbacksToDefault(USART_HandleTypeDef *husart)
2164{
2165 /* Init the USART Callback settings */
2166 husart->TxHalfCpltCallback = HAL_USART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
2167 husart->TxCpltCallback = HAL_USART_TxCpltCallback; /* Legacy weak TxCpltCallback */
2168 husart->RxHalfCpltCallback = HAL_USART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
2169 husart->RxCpltCallback = HAL_USART_RxCpltCallback; /* Legacy weak RxCpltCallback */
2170 husart->TxRxCpltCallback = HAL_USART_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */
2171 husart->ErrorCallback = HAL_USART_ErrorCallback; /* Legacy weak ErrorCallback */
2172 husart->AbortCpltCallback = HAL_USART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
2173}
2174#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2175
2182static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
2183{
2184 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2185 /* DMA Normal mode */
2186 if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
2187 {
2188 husart->TxXferCount = 0U;
2189 if (husart->State == HAL_USART_STATE_BUSY_TX)
2190 {
2191 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
2192 in the USART CR3 register */
2193 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
2194
2195 /* Enable the USART Transmit Complete Interrupt */
2196 SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
2197 }
2198 }
2199 /* DMA Circular mode */
2200 else
2201 {
2202 if (husart->State == HAL_USART_STATE_BUSY_TX)
2203 {
2204#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2205 /* Call registered Tx Complete Callback */
2206 husart->TxCpltCallback(husart);
2207#else
2208 /* Call legacy weak Tx Complete Callback */
2210#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2211 }
2212 }
2213}
2214
2221static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
2222{
2223 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2224
2225#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2226 /* Call registered Tx Half Complete Callback */
2227 husart->TxHalfCpltCallback(husart);
2228#else
2229 /* Call legacy weak Tx Half Complete Callback */
2231#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2232}
2233
2240static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
2241{
2242 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2243 /* DMA Normal mode */
2244 if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
2245 {
2246 husart->RxXferCount = 0x00U;
2247
2248 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2249 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
2250 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2251
2252 /* Disable the DMA transfer for the Transmit/receiver request by clearing the DMAT/DMAR bit
2253 in the USART CR3 register */
2254 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
2255 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
2256
2257 /* The USART state is HAL_USART_STATE_BUSY_RX */
2258 if (husart->State == HAL_USART_STATE_BUSY_RX)
2259 {
2260#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2261 /* Call registered Rx Complete Callback */
2262 husart->RxCpltCallback(husart);
2263#else
2264 /* Call legacy weak Rx Complete Callback */
2266#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2267 }
2268 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
2269 else
2270 {
2271#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2272 /* Call registered Tx Rx Complete Callback */
2273 husart->TxRxCpltCallback(husart);
2274#else
2275 /* Call legacy weak Tx Rx Complete Callback */
2277#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2278 }
2279 husart->State = HAL_USART_STATE_READY;
2280 }
2281 /* DMA circular mode */
2282 else
2283 {
2284 if (husart->State == HAL_USART_STATE_BUSY_RX)
2285 {
2286#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2287 /* Call registered Rx Complete Callback */
2288 husart->RxCpltCallback(husart);
2289#else
2290 /* Call legacy weak Rx Complete Callback */
2292#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2293 }
2294 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
2295 else
2296 {
2297#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2298 /* Call registered Tx Rx Complete Callback */
2299 husart->TxRxCpltCallback(husart);
2300#else
2301 /* Call legacy weak Tx Rx Complete Callback */
2303#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2304 }
2305 }
2306}
2307
2314static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
2315{
2316 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2317
2318#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2319 /* Call registered Rx Half Complete Callback */
2320 husart->RxHalfCpltCallback(husart);
2321#else
2322 /* Call legacy weak Rx Half Complete Callback */
2324#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2325}
2326
2333static void USART_DMAError(DMA_HandleTypeDef *hdma)
2334{
2335 uint32_t dmarequest = 0x00U;
2336 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2337 husart->RxXferCount = 0x00U;
2338 husart->TxXferCount = 0x00U;
2339
2340 /* Stop USART DMA Tx request if ongoing */
2341 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
2342 if ((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
2343 {
2344 USART_EndTxTransfer(husart);
2345 }
2346
2347 /* Stop USART DMA Rx request if ongoing */
2348 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
2349 if ((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
2350 {
2351 USART_EndRxTransfer(husart);
2352 }
2353
2354 husart->ErrorCode |= HAL_USART_ERROR_DMA;
2355 husart->State = HAL_USART_STATE_READY;
2356
2357#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2358 /* Call registered Error Callback */
2359 husart->ErrorCallback(husart);
2360#else
2361 /* Call legacy weak Error Callback */
2363#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2364}
2365
2377static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status,
2378 uint32_t Tickstart, uint32_t Timeout)
2379{
2380 /* Wait until flag is set */
2381 while ((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
2382 {
2383 /* Check for the Timeout */
2384 if (Timeout != HAL_MAX_DELAY)
2385 {
2386 if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
2387 {
2388 /* Disable the USART Transmit Complete Interrupt */
2389 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
2390
2391 /* Disable the USART RXNE Interrupt */
2392 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
2393
2394 /* Disable the USART Parity Error Interrupt */
2395 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
2396
2397 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
2398 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2399
2400 husart->State = HAL_USART_STATE_READY;
2401
2402 /* Process Unlocked */
2403 __HAL_UNLOCK(husart);
2404
2405 return HAL_TIMEOUT;
2406 }
2407 }
2408 }
2409 return HAL_OK;
2410}
2411
2417static void USART_EndTxTransfer(USART_HandleTypeDef *husart)
2418{
2419 /* Disable TXEIE and TCIE interrupts */
2420 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
2421
2422 /* At end of Tx process, restore husart->State to Ready */
2423 husart->State = HAL_USART_STATE_READY;
2424}
2425
2431static void USART_EndRxTransfer(USART_HandleTypeDef *husart)
2432{
2433 /* Disable RXNE, PE and ERR interrupts */
2434 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2435 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2436
2437 /* At end of Rx process, restore husart->State to Ready */
2438 husart->State = HAL_USART_STATE_READY;
2439}
2440
2447static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
2448{
2449 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2450 husart->RxXferCount = 0x00U;
2451 husart->TxXferCount = 0x00U;
2452
2453#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2454 /* Call registered Error Callback */
2455 husart->ErrorCallback(husart);
2456#else
2457 /* Call legacy weak Error Callback */
2459#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2460}
2461
2470static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
2471{
2472 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2473
2474 husart->hdmatx->XferAbortCallback = NULL;
2475
2476 /* Check if an Abort process is still ongoing */
2477 if (husart->hdmarx != NULL)
2478 {
2479 if (husart->hdmarx->XferAbortCallback != NULL)
2480 {
2481 return;
2482 }
2483 }
2484
2485 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
2486 husart->TxXferCount = 0x00U;
2487 husart->RxXferCount = 0x00U;
2488
2489 /* Reset errorCode */
2491
2492 /* Restore husart->State to Ready */
2493 husart->State = HAL_USART_STATE_READY;
2494
2495 /* Call user Abort complete callback */
2496#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2497 /* Call registered Abort Complete Callback */
2498 husart->AbortCpltCallback(husart);
2499#else
2500 /* Call legacy weak Abort Complete Callback */
2502#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2503}
2504
2513static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
2514{
2515 USART_HandleTypeDef *husart = (USART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2516
2517 husart->hdmarx->XferAbortCallback = NULL;
2518
2519 /* Check if an Abort process is still ongoing */
2520 if (husart->hdmatx != NULL)
2521 {
2522 if (husart->hdmatx->XferAbortCallback != NULL)
2523 {
2524 return;
2525 }
2526 }
2527
2528 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
2529 husart->TxXferCount = 0x00U;
2530 husart->RxXferCount = 0x00U;
2531
2532 /* Reset errorCode */
2534
2535 /* Restore husart->State to Ready */
2536 husart->State = HAL_USART_STATE_READY;
2537
2538 /* Call user Abort complete callback */
2539#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2540 /* Call registered Abort Complete Callback */
2541 husart->AbortCpltCallback(husart);
2542#else
2543 /* Call legacy weak Abort Complete Callback */
2545#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2546}
2547
2555static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
2556{
2557 const uint16_t *tmp;
2558
2559 if (husart->State == HAL_USART_STATE_BUSY_TX)
2560 {
2561 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
2562 {
2563 tmp = (const uint16_t *) husart->pTxBuffPtr;
2564 husart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
2565 husart->pTxBuffPtr += 2U;
2566 }
2567 else
2568 {
2569 husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FF);
2570 }
2571
2572 if (--husart->TxXferCount == 0U)
2573 {
2574 /* Disable the USART Transmit data register empty Interrupt */
2575 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
2576
2577 /* Enable the USART Transmit Complete Interrupt */
2578 SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
2579 }
2580 return HAL_OK;
2581 }
2582 else
2583 {
2584 return HAL_BUSY;
2585 }
2586}
2587
2594static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
2595{
2596 /* Disable the USART Transmit Complete Interrupt */
2597 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TCIE);
2598
2599 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
2600 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2601
2602 husart->State = HAL_USART_STATE_READY;
2603
2604#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2605 /* Call registered Tx Complete Callback */
2606 husart->TxCpltCallback(husart);
2607#else
2608 /* Call legacy weak Tx Complete Callback */
2610#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2611
2612 return HAL_OK;
2613}
2614
2621static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
2622{
2623 uint8_t *pdata8bits = NULL;
2624 uint16_t *pdata16bits = NULL;
2625
2626 if (husart->State == HAL_USART_STATE_BUSY_RX)
2627 {
2628 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
2629 {
2630 /* Unused pdata8bits */
2631 UNUSED(pdata8bits);
2632 pdata16bits = (uint16_t *) husart->pRxBuffPtr;
2633 *pdata16bits = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
2634 husart->pRxBuffPtr += 2U;
2635 }
2636 else
2637 {
2638 pdata8bits = (uint8_t *) husart->pRxBuffPtr;
2639 /* Unused pdata16bits */
2640 UNUSED(pdata16bits);
2641
2642 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) || ((husart->Init.WordLength == USART_WORDLENGTH_8B) && (husart->Init.Parity == USART_PARITY_NONE)))
2643 {
2644 *pdata8bits = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FF);
2645 }
2646 else
2647 {
2648 *pdata8bits = (uint8_t)(husart->Instance->DR & (uint8_t)0x007F);
2649 }
2650
2651 husart->pRxBuffPtr += 1U;
2652 }
2653
2654 husart->RxXferCount--;
2655
2656 if (husart->RxXferCount == 0U)
2657 {
2658 /* Disable the USART RXNE Interrupt */
2659 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
2660
2661 /* Disable the USART Parity Error Interrupt */
2662 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
2663
2664 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
2665 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2666
2667 husart->State = HAL_USART_STATE_READY;
2668#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2669 /* Call registered Rx Complete Callback */
2670 husart->RxCpltCallback(husart);
2671#else
2672 /* Call legacy weak Rx Complete Callback */
2674#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2675
2676 return HAL_OK;
2677 }
2678 else
2679 {
2680 /* Send dummy byte in order to generate the clock for the slave to send the next data.
2681 * Whatever the frame length (7, 8 or 9-bit long), the same dummy value
2682 * can be written for all the cases. */
2683 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x0FF);
2684 }
2685 return HAL_OK;
2686 }
2687 else
2688 {
2689 return HAL_BUSY;
2690 }
2691}
2692
2699static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
2700{
2701 const uint16_t *pdatatx16bits;
2702 uint16_t *pdatarx16bits;
2703
2704 if (husart->State == HAL_USART_STATE_BUSY_TX_RX)
2705 {
2706 if (husart->TxXferCount != 0x00U)
2707 {
2708 if (__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
2709 {
2710 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
2711 {
2712 pdatatx16bits = (const uint16_t *) husart->pTxBuffPtr;
2713 husart->Instance->DR = (uint16_t)(*pdatatx16bits & (uint16_t)0x01FF);
2714 husart->pTxBuffPtr += 2U;
2715 }
2716 else
2717 {
2718 husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FF);
2719 }
2720
2721 husart->TxXferCount--;
2722
2723 /* Check the latest data transmitted */
2724 if (husart->TxXferCount == 0U)
2725 {
2726 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
2727 }
2728 }
2729 }
2730
2731 if (husart->RxXferCount != 0x00U)
2732 {
2733 if (__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
2734 {
2735 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
2736 {
2737 pdatarx16bits = (uint16_t *) husart->pRxBuffPtr;
2738 *pdatarx16bits = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FF);
2739 husart->pRxBuffPtr += 2U;
2740 }
2741 else
2742 {
2743 if ((husart->Init.WordLength == USART_WORDLENGTH_9B) || ((husart->Init.WordLength == USART_WORDLENGTH_8B) && (husart->Init.Parity == USART_PARITY_NONE)))
2744 {
2745 *husart->pRxBuffPtr = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FF);
2746 }
2747 else
2748 {
2749 *husart->pRxBuffPtr = (uint8_t)(husart->Instance->DR & (uint8_t)0x007F);
2750 }
2751 husart->pRxBuffPtr += 1U;
2752 }
2753
2754 husart->RxXferCount--;
2755 }
2756 }
2757
2758 /* Check the latest data received */
2759 if (husart->RxXferCount == 0U)
2760 {
2761 /* Disable the USART RXNE Interrupt */
2762 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
2763
2764 /* Disable the USART Parity Error Interrupt */
2765 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
2766
2767 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
2768 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
2769
2770 husart->State = HAL_USART_STATE_READY;
2771
2772#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
2773 /* Call registered Tx Rx Complete Callback */
2774 husart->TxRxCpltCallback(husart);
2775#else
2776 /* Call legacy weak Tx Rx Complete Callback */
2778#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
2779
2780 return HAL_OK;
2781 }
2782
2783 return HAL_OK;
2784 }
2785 else
2786 {
2787 return HAL_BUSY;
2788 }
2789}
2790
2797static void USART_SetConfig(USART_HandleTypeDef *husart)
2798{
2799 uint32_t tmpreg = 0x00U;
2800 uint32_t pclk;
2801
2802 /* Check the parameters */
2803 assert_param(IS_USART_INSTANCE(husart->Instance));
2812
2813 /* The LBCL, CPOL and CPHA bits have to be selected when both the transmitter and the
2814 receiver are disabled (TE=RE=0) to ensure that the clock pulses function correctly. */
2815 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2816
2817 /*---------------------------- USART CR2 Configuration ---------------------*/
2818 tmpreg = husart->Instance->CR2;
2819 /* Clear CLKEN, CPOL, CPHA and LBCL bits */
2820 tmpreg &= (uint32_t)~((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP));
2821 /* Configure the USART Clock, CPOL, CPHA and LastBit -----------------------*/
2822 /* Set CPOL bit according to husart->Init.CLKPolarity value */
2823 /* Set CPHA bit according to husart->Init.CLKPhase value */
2824 /* Set LBCL bit according to husart->Init.CLKLastBit value */
2825 /* Set Stop Bits: Set STOP[13:12] bits according to husart->Init.StopBits value */
2826 tmpreg |= (uint32_t)(USART_CLOCK_ENABLE | husart->Init.CLKPolarity |
2827 husart->Init.CLKPhase | husart->Init.CLKLastBit | husart->Init.StopBits);
2828 /* Write to USART CR2 */
2829 WRITE_REG(husart->Instance->CR2, (uint32_t)tmpreg);
2830
2831 /*-------------------------- USART CR1 Configuration -----------------------*/
2832 tmpreg = husart->Instance->CR1;
2833
2834 /* Clear M, PCE, PS, TE, RE and OVER8 bits */
2835 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | \
2836 USART_CR1_RE | USART_CR1_OVER8));
2837
2838 /* Configure the USART Word Length, Parity and mode:
2839 Set the M bits according to husart->Init.WordLength value
2840 Set PCE and PS bits according to husart->Init.Parity value
2841 Set TE and RE bits according to husart->Init.Mode value
2842 Force OVER8 bit to 1 in order to reach the max USART frequencies */
2843 tmpreg |= (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
2844
2845 /* Write to USART CR1 */
2846 WRITE_REG(husart->Instance->CR1, (uint32_t)tmpreg);
2847
2848 /*-------------------------- USART CR3 Configuration -----------------------*/
2849 /* Clear CTSE and RTSE bits */
2850 CLEAR_BIT(husart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE));
2851
2852 /*-------------------------- USART BRR Configuration -----------------------*/
2853#if defined(USART6) && defined(UART9) && defined(UART10)
2854 if ((husart->Instance == USART1) || (husart->Instance == USART6) || (husart->Instance == UART9) || (husart->Instance == UART10))
2855 {
2856 pclk = HAL_RCC_GetPCLK2Freq();
2857 husart->Instance->BRR = USART_BRR(pclk, husart->Init.BaudRate);
2858 }
2859#elif defined(USART6)
2860 if((husart->Instance == USART1) || (husart->Instance == USART6))
2861 {
2862 pclk = HAL_RCC_GetPCLK2Freq();
2863 husart->Instance->BRR = USART_BRR(pclk, husart->Init.BaudRate);
2864 }
2865#else
2866 if(husart->Instance == USART1)
2867 {
2868 pclk = HAL_RCC_GetPCLK2Freq();
2869 husart->Instance->BRR = USART_BRR(pclk, husart->Init.BaudRate);
2870 }
2871#endif /* USART6 || UART9 || UART10 */
2872 else
2873 {
2874 pclk = HAL_RCC_GetPCLK1Freq();
2875 husart->Instance->BRR = USART_BRR(pclk, husart->Init.BaudRate);
2876 }
2877}
2878
2882
2883#endif /* HAL_USART_MODULE_ENABLED */
2887
2891
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
uint32_t HAL_RCC_GetPCLK1Freq(void)
uint32_t HAL_RCC_GetPCLK2Freq(void)
#define USART_CLOCK_ENABLE
#define HAL_USART_ERROR_NONE
#define HAL_USART_ERROR_NE
#define HAL_USART_ERROR_PE
#define HAL_USART_ERROR_FE
#define HAL_USART_ERROR_DMA
#define HAL_USART_ERROR_ORE
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
void HAL_USART_MspInit(USART_HandleTypeDef *husart)
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size)
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size)
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
HAL_USART_StateTypeDef HAL_USART_GetState(const USART_HandleTypeDef *husart)
uint32_t HAL_USART_GetError(const USART_HandleTypeDef *husart)
#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__)
Check whether the specified USART flag is set or not.
#define __HAL_USART_ENABLE(__HANDLE__)
Enable USART.
#define __HAL_USART_DISABLE(__HANDLE__)
Disable USART.
#define __HAL_USART_CLEAR_OREFLAG(__HANDLE__)
Clear the USART ORE pending flag.
#define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__)
Clear the specified USART pending flags.
HAL_USART_StateTypeDef
HAL State structures definition.
struct __USART_HandleTypeDef USART_HandleTypeDef
USART handle Structure definition.
@ HAL_USART_STATE_BUSY_TX
@ HAL_USART_STATE_BUSY_RX
@ HAL_USART_STATE_BUSY_TX_RX
@ HAL_USART_STATE_RESET
@ HAL_USART_STATE_READY
@ HAL_USART_STATE_BUSY
#define USART_FLAG_RXNE
#define USART_FLAG_TXE
#define USART_FLAG_TC
#define USART_PARITY_NONE
#define IS_USART_POLARITY(CPOL)
#define IS_USART_WORD_LENGTH(LENGTH)
#define IS_USART_PHASE(CPHA)
#define IS_USART_STOPBITS(STOPBITS)
#define USART_BRR(_PCLK_, _BAUD_)
#define IS_USART_BAUDRATE(BAUDRATE)
#define IS_USART_PARITY(PARITY)
#define IS_USART_LASTBIT(LASTBIT)
#define IS_USART_MODE(MODE)
#define USART_WORDLENGTH_9B
#define USART_WORDLENGTH_8B
#define assert_param(expr)
This file contains all the functions prototypes for the HAL module driver.
#define HAL_IS_BIT_SET(REG, BIT)
HAL_StatusTypeDef
HAL Status structures definition.
@ HAL_TIMEOUT
@ HAL_ERROR
@ HAL_OK
@ HAL_BUSY
#define __HAL_UNLOCK(__HANDLE__)
#define HAL_MAX_DELAY
@ HAL_UNLOCKED
#define __HAL_LOCK(__HANDLE__)
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
DMA_Stream_TypeDef * Instance
DMA_HandleTypeDef * hdmatx
volatile uint16_t RxXferCount
DMA_HandleTypeDef * hdmarx
volatile HAL_USART_StateTypeDef State
volatile uint16_t TxXferCount
volatile uint32_t ErrorCode