STM32F4xx HAL Driver master
STM32CubeF4 HAL / LL Drivers API Reference
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stm32f4xx_hal_uart.c
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1
256
257/* Includes ------------------------------------------------------------------*/
258#include "stm32f4xx_hal.h"
259
263
268#ifdef HAL_UART_MODULE_ENABLED
269
270/* Private typedef -----------------------------------------------------------*/
271/* Private define ------------------------------------------------------------*/
278/* Private macro -------------------------------------------------------------*/
279/* Private variables ---------------------------------------------------------*/
280/* Private function prototypes -----------------------------------------------*/
284
285#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
286void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
287#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
288static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
289static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
290static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
291static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
292static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
293static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
294static void UART_DMAError(DMA_HandleTypeDef *hdma);
295static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
296static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
297static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
298static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
299static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
300static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
301static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
302static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
303static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
304 uint32_t Tickstart, uint32_t Timeout);
305static void UART_SetConfig(UART_HandleTypeDef *huart);
306
310
311/* Exported functions ---------------------------------------------------------*/
315
349
358{
359 /* Check the UART handle allocation */
360 if (huart == NULL)
361 {
362 return HAL_ERROR;
363 }
364
365 /* Check the parameters */
366 if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
367 {
368 /* The hardware flow control is available only for USART1, USART2, USART3 and USART6.
369 Except for STM32F446xx devices, that is available for USART1, USART2, USART3, USART6, UART4 and UART5.
370 */
371 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
373 }
374 else
375 {
376 assert_param(IS_UART_INSTANCE(huart->Instance));
377 }
380
381 if (huart->gState == HAL_UART_STATE_RESET)
382 {
383 /* Allocate lock resource and initialize it */
384 huart->Lock = HAL_UNLOCKED;
385
386#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
387 UART_InitCallbacksToDefault(huart);
388
389 if (huart->MspInitCallback == NULL)
390 {
391 huart->MspInitCallback = HAL_UART_MspInit;
392 }
393
394 /* Init the low level hardware */
395 huart->MspInitCallback(huart);
396#else
397 /* Init the low level hardware : GPIO, CLOCK */
398 HAL_UART_MspInit(huart);
399#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
400 }
401
403
404 /* Disable the peripheral */
405 __HAL_UART_DISABLE(huart);
406
407 /* Set the UART Communication parameters */
408 UART_SetConfig(huart);
409
410 /* In asynchronous mode, the following bits must be kept cleared:
411 - LINEN and CLKEN bits in the USART_CR2 register,
412 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
413 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
414 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
415
416 /* Enable the peripheral */
417 __HAL_UART_ENABLE(huart);
418
419 /* Initialize the UART state */
424
425 return HAL_OK;
426}
427
436{
437 /* Check the UART handle allocation */
438 if (huart == NULL)
439 {
440 return HAL_ERROR;
441 }
442
443 /* Check the parameters */
444 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
447
448 if (huart->gState == HAL_UART_STATE_RESET)
449 {
450 /* Allocate lock resource and initialize it */
451 huart->Lock = HAL_UNLOCKED;
452
453#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
454 UART_InitCallbacksToDefault(huart);
455
456 if (huart->MspInitCallback == NULL)
457 {
458 huart->MspInitCallback = HAL_UART_MspInit;
459 }
460
461 /* Init the low level hardware */
462 huart->MspInitCallback(huart);
463#else
464 /* Init the low level hardware : GPIO, CLOCK */
465 HAL_UART_MspInit(huart);
466#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
467 }
468
470
471 /* Disable the peripheral */
472 __HAL_UART_DISABLE(huart);
473
474 /* Set the UART Communication parameters */
475 UART_SetConfig(huart);
476
477 /* In half-duplex mode, the following bits must be kept cleared:
478 - LINEN and CLKEN bits in the USART_CR2 register,
479 - SCEN and IREN bits in the USART_CR3 register.*/
480 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
481 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
482
483 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
484 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
485
486 /* Enable the peripheral */
487 __HAL_UART_ENABLE(huart);
488
489 /* Initialize the UART state*/
494
495 return HAL_OK;
496}
497
509HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
510{
511 /* Check the UART handle allocation */
512 if (huart == NULL)
513 {
514 return HAL_ERROR;
515 }
516
517 /* Check the LIN UART instance */
518 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
519
520 /* Check the Break detection length parameter */
524
525 if (huart->gState == HAL_UART_STATE_RESET)
526 {
527 /* Allocate lock resource and initialize it */
528 huart->Lock = HAL_UNLOCKED;
529
530#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
531 UART_InitCallbacksToDefault(huart);
532
533 if (huart->MspInitCallback == NULL)
534 {
535 huart->MspInitCallback = HAL_UART_MspInit;
536 }
537
538 /* Init the low level hardware */
539 huart->MspInitCallback(huart);
540#else
541 /* Init the low level hardware : GPIO, CLOCK */
542 HAL_UART_MspInit(huart);
543#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
544 }
545
547
548 /* Disable the peripheral */
549 __HAL_UART_DISABLE(huart);
550
551 /* Set the UART Communication parameters */
552 UART_SetConfig(huart);
553
554 /* In LIN mode, the following bits must be kept cleared:
555 - CLKEN bits in the USART_CR2 register,
556 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
557 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_CLKEN));
558 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
559
560 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
561 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
562
563 /* Set the USART LIN Break detection length. */
564 CLEAR_BIT(huart->Instance->CR2, USART_CR2_LBDL);
565 SET_BIT(huart->Instance->CR2, BreakDetectLength);
566
567 /* Enable the peripheral */
568 __HAL_UART_ENABLE(huart);
569
570 /* Initialize the UART state*/
575
576 return HAL_OK;
577}
578
591HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
592{
593 /* Check the UART handle allocation */
594 if (huart == NULL)
595 {
596 return HAL_ERROR;
597 }
598
599 /* Check the parameters */
600 assert_param(IS_UART_INSTANCE(huart->Instance));
601
602 /* Check the Address & wake up method parameters */
603 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
607
608 if (huart->gState == HAL_UART_STATE_RESET)
609 {
610 /* Allocate lock resource and initialize it */
611 huart->Lock = HAL_UNLOCKED;
612
613#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
614 UART_InitCallbacksToDefault(huart);
615
616 if (huart->MspInitCallback == NULL)
617 {
618 huart->MspInitCallback = HAL_UART_MspInit;
619 }
620
621 /* Init the low level hardware */
622 huart->MspInitCallback(huart);
623#else
624 /* Init the low level hardware : GPIO, CLOCK */
625 HAL_UART_MspInit(huart);
626#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
627 }
628
630
631 /* Disable the peripheral */
632 __HAL_UART_DISABLE(huart);
633
634 /* Set the UART Communication parameters */
635 UART_SetConfig(huart);
636
637 /* In Multi-Processor mode, the following bits must be kept cleared:
638 - LINEN and CLKEN bits in the USART_CR2 register,
639 - SCEN, HDSEL and IREN bits in the USART_CR3 register */
640 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
641 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
642
643 /* Set the USART address node */
644 CLEAR_BIT(huart->Instance->CR2, USART_CR2_ADD);
645 SET_BIT(huart->Instance->CR2, Address);
646
647 /* Set the wake up method by setting the WAKE bit in the CR1 register */
648 CLEAR_BIT(huart->Instance->CR1, USART_CR1_WAKE);
649 SET_BIT(huart->Instance->CR1, WakeUpMethod);
650
651 /* Enable the peripheral */
652 __HAL_UART_ENABLE(huart);
653
654 /* Initialize the UART state */
659
660 return HAL_OK;
661}
662
670{
671 /* Check the UART handle allocation */
672 if (huart == NULL)
673 {
674 return HAL_ERROR;
675 }
676
677 /* Check the parameters */
678 assert_param(IS_UART_INSTANCE(huart->Instance));
679
681
682 /* Disable the Peripheral */
683 __HAL_UART_DISABLE(huart);
684
685#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
686 if (huart->MspDeInitCallback == NULL)
687 {
688 huart->MspDeInitCallback = HAL_UART_MspDeInit;
689 }
690 /* DeInit the low level hardware */
691 huart->MspDeInitCallback(huart);
692#else
693 /* DeInit the low level hardware */
694 HAL_UART_MspDeInit(huart);
695#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
696
702
703 /* Process Unlock */
704 __HAL_UNLOCK(huart);
705
706 return HAL_OK;
707}
708
715__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
716{
717 /* Prevent unused argument(s) compilation warning */
718 UNUSED(huart);
719 /* NOTE: This function should not be modified, when the callback is needed,
720 the HAL_UART_MspInit could be implemented in the user file
721 */
722}
723
730__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
731{
732 /* Prevent unused argument(s) compilation warning */
733 UNUSED(huart);
734 /* NOTE: This function should not be modified, when the callback is needed,
735 the HAL_UART_MspDeInit could be implemented in the user file
736 */
737}
738
739#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
761HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
762 pUART_CallbackTypeDef pCallback)
763{
764 HAL_StatusTypeDef status = HAL_OK;
765
766 if (pCallback == NULL)
767 {
768 /* Update the error code */
769 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
770
771 return HAL_ERROR;
772 }
773
774 if (huart->gState == HAL_UART_STATE_READY)
775 {
776 switch (CallbackID)
777 {
778 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
779 huart->TxHalfCpltCallback = pCallback;
780 break;
781
782 case HAL_UART_TX_COMPLETE_CB_ID :
783 huart->TxCpltCallback = pCallback;
784 break;
785
786 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
787 huart->RxHalfCpltCallback = pCallback;
788 break;
789
790 case HAL_UART_RX_COMPLETE_CB_ID :
791 huart->RxCpltCallback = pCallback;
792 break;
793
794 case HAL_UART_ERROR_CB_ID :
795 huart->ErrorCallback = pCallback;
796 break;
797
798 case HAL_UART_ABORT_COMPLETE_CB_ID :
799 huart->AbortCpltCallback = pCallback;
800 break;
801
802 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
803 huart->AbortTransmitCpltCallback = pCallback;
804 break;
805
806 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
807 huart->AbortReceiveCpltCallback = pCallback;
808 break;
809
810 case HAL_UART_MSPINIT_CB_ID :
811 huart->MspInitCallback = pCallback;
812 break;
813
814 case HAL_UART_MSPDEINIT_CB_ID :
815 huart->MspDeInitCallback = pCallback;
816 break;
817
818 default :
819 /* Update the error code */
820 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
821
822 /* Return error status */
823 status = HAL_ERROR;
824 break;
825 }
826 }
827 else if (huart->gState == HAL_UART_STATE_RESET)
828 {
829 switch (CallbackID)
830 {
831 case HAL_UART_MSPINIT_CB_ID :
832 huart->MspInitCallback = pCallback;
833 break;
834
835 case HAL_UART_MSPDEINIT_CB_ID :
836 huart->MspDeInitCallback = pCallback;
837 break;
838
839 default :
840 /* Update the error code */
841 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
842
843 /* Return error status */
844 status = HAL_ERROR;
845 break;
846 }
847 }
848 else
849 {
850 /* Update the error code */
851 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
852
853 /* Return error status */
854 status = HAL_ERROR;
855 }
856
857 return status;
858}
859
881HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
882{
883 HAL_StatusTypeDef status = HAL_OK;
884
885 if (HAL_UART_STATE_READY == huart->gState)
886 {
887 switch (CallbackID)
888 {
889 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
890 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
891 break;
892
893 case HAL_UART_TX_COMPLETE_CB_ID :
894 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
895 break;
896
897 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
898 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
899 break;
900
901 case HAL_UART_RX_COMPLETE_CB_ID :
902 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
903 break;
904
905 case HAL_UART_ERROR_CB_ID :
906 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
907 break;
908
909 case HAL_UART_ABORT_COMPLETE_CB_ID :
910 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
911 break;
912
913 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
914 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
915 break;
916
917 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
918 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
919 break;
920
921 case HAL_UART_MSPINIT_CB_ID :
922 huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
923 break;
924
925 case HAL_UART_MSPDEINIT_CB_ID :
926 huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
927 break;
928
929 default :
930 /* Update the error code */
931 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
932
933 /* Return error status */
934 status = HAL_ERROR;
935 break;
936 }
937 }
938 else if (HAL_UART_STATE_RESET == huart->gState)
939 {
940 switch (CallbackID)
941 {
942 case HAL_UART_MSPINIT_CB_ID :
943 huart->MspInitCallback = HAL_UART_MspInit;
944 break;
945
946 case HAL_UART_MSPDEINIT_CB_ID :
947 huart->MspDeInitCallback = HAL_UART_MspDeInit;
948 break;
949
950 default :
951 /* Update the error code */
952 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
953
954 /* Return error status */
955 status = HAL_ERROR;
956 break;
957 }
958 }
959 else
960 {
961 /* Update the error code */
962 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
963
964 /* Return error status */
965 status = HAL_ERROR;
966 }
967
968 return status;
969}
970
978HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback)
979{
980 HAL_StatusTypeDef status = HAL_OK;
981
982 if (pCallback == NULL)
983 {
984 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
985
986 return HAL_ERROR;
987 }
988
989 /* Process locked */
990 __HAL_LOCK(huart);
991
992 if (huart->gState == HAL_UART_STATE_READY)
993 {
994 huart->RxEventCallback = pCallback;
995 }
996 else
997 {
998 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
999
1000 status = HAL_ERROR;
1001 }
1002
1003 /* Release Lock */
1004 __HAL_UNLOCK(huart);
1005
1006 return status;
1007}
1008
1015HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
1016{
1017 HAL_StatusTypeDef status = HAL_OK;
1018
1019 /* Process locked */
1020 __HAL_LOCK(huart);
1021
1022 if (huart->gState == HAL_UART_STATE_READY)
1023 {
1024 huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */
1025 }
1026 else
1027 {
1028 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
1029
1030 status = HAL_ERROR;
1031 }
1032
1033 /* Release Lock */
1034 __HAL_UNLOCK(huart);
1035 return status;
1036}
1037#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1038
1042
1122
1135HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
1136{
1137 const uint8_t *pdata8bits;
1138 const uint16_t *pdata16bits;
1139 uint32_t tickstart = 0U;
1140
1141 /* Check that a Tx process is not already ongoing */
1142 if (huart->gState == HAL_UART_STATE_READY)
1143 {
1144 if ((pData == NULL) || (Size == 0U))
1145 {
1146 return HAL_ERROR;
1147 }
1148
1151
1152 /* Init tickstart for timeout management */
1153 tickstart = HAL_GetTick();
1154
1155 huart->TxXferSize = Size;
1156 huart->TxXferCount = Size;
1157
1158 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
1159 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1160 {
1161 pdata8bits = NULL;
1162 pdata16bits = (const uint16_t *) pData;
1163 }
1164 else
1165 {
1166 pdata8bits = pData;
1167 pdata16bits = NULL;
1168 }
1169
1170 while (huart->TxXferCount > 0U)
1171 {
1172 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1173 {
1175
1176 return HAL_TIMEOUT;
1177 }
1178 if (pdata8bits == NULL)
1179 {
1180 huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
1181 pdata16bits++;
1182 }
1183 else
1184 {
1185 huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
1186 pdata8bits++;
1187 }
1188 huart->TxXferCount--;
1189 }
1190
1191 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1192 {
1194
1195 return HAL_TIMEOUT;
1196 }
1197
1198 /* At end of Tx process, restore huart->gState to Ready */
1200
1201 return HAL_OK;
1202 }
1203 else
1204 {
1205 return HAL_BUSY;
1206 }
1207}
1208
1221HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1222{
1223 uint8_t *pdata8bits;
1224 uint16_t *pdata16bits;
1225 uint32_t tickstart = 0U;
1226
1227 /* Check that a Rx process is not already ongoing */
1228 if (huart->RxState == HAL_UART_STATE_READY)
1229 {
1230 if ((pData == NULL) || (Size == 0U))
1231 {
1232 return HAL_ERROR;
1233 }
1234
1238
1239 /* Init tickstart for timeout management */
1240 tickstart = HAL_GetTick();
1241
1242 huart->RxXferSize = Size;
1243 huart->RxXferCount = Size;
1244
1245 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1246 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1247 {
1248 pdata8bits = NULL;
1249 pdata16bits = (uint16_t *) pData;
1250 }
1251 else
1252 {
1253 pdata8bits = pData;
1254 pdata16bits = NULL;
1255 }
1256
1257 /* Check the remain data to be received */
1258 while (huart->RxXferCount > 0U)
1259 {
1260 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1261 {
1263
1264 return HAL_TIMEOUT;
1265 }
1266 if (pdata8bits == NULL)
1267 {
1268 *pdata16bits = (uint16_t)(huart->Instance->DR & 0x01FF);
1269 pdata16bits++;
1270 }
1271 else
1272 {
1273 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
1274 {
1275 *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
1276 }
1277 else
1278 {
1279 *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
1280 }
1281 pdata8bits++;
1282 }
1283 huart->RxXferCount--;
1284 }
1285
1286 /* At end of Rx process, restore huart->RxState to Ready */
1288
1289 return HAL_OK;
1290 }
1291 else
1292 {
1293 return HAL_BUSY;
1294 }
1295}
1296
1308HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1309{
1310 /* Check that a Tx process is not already ongoing */
1311 if (huart->gState == HAL_UART_STATE_READY)
1312 {
1313 if ((pData == NULL) || (Size == 0U))
1314 {
1315 return HAL_ERROR;
1316 }
1317
1318 huart->pTxBuffPtr = pData;
1319 huart->TxXferSize = Size;
1320 huart->TxXferCount = Size;
1321
1324
1325 /* Enable the UART Transmit data register empty Interrupt */
1327
1328 return HAL_OK;
1329 }
1330 else
1331 {
1332 return HAL_BUSY;
1333 }
1334}
1335
1347HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1348{
1349 /* Check that a Rx process is not already ongoing */
1350 if (huart->RxState == HAL_UART_STATE_READY)
1351 {
1352 if ((pData == NULL) || (Size == 0U))
1353 {
1354 return HAL_ERROR;
1355 }
1356
1357 /* Set Reception type to Standard reception */
1359
1360 return (UART_Start_Receive_IT(huart, pData, Size));
1361 }
1362 else
1363 {
1364 return HAL_BUSY;
1365 }
1366}
1367
1379HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1380{
1381 const uint32_t *tmp;
1382
1383 /* Check that a Tx process is not already ongoing */
1384 if (huart->gState == HAL_UART_STATE_READY)
1385 {
1386 if ((pData == NULL) || (Size == 0U))
1387 {
1388 return HAL_ERROR;
1389 }
1390
1391 huart->pTxBuffPtr = pData;
1392 huart->TxXferSize = Size;
1393 huart->TxXferCount = Size;
1394
1397
1398 /* Set the UART DMA transfer complete callback */
1399 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1400
1401 /* Set the UART DMA Half transfer complete callback */
1402 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1403
1404 /* Set the DMA error callback */
1405 huart->hdmatx->XferErrorCallback = UART_DMAError;
1406
1407 /* Set the DMA abort callback */
1408 huart->hdmatx->XferAbortCallback = NULL;
1409
1410 /* Enable the UART transmit DMA stream */
1411 tmp = (const uint32_t *)&pData;
1412 if (HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size) != HAL_OK)
1413 {
1414 /* Set error code to DMA */
1416
1417 /* Restore huart->gState to ready */
1419
1420 return HAL_ERROR;
1421 }
1422 /* Clear the TC flag in the SR register by writing 0 to it */
1424
1425 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1426 in the UART CR3 register */
1427 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1428
1429 return HAL_OK;
1430 }
1431 else
1432 {
1433 return HAL_BUSY;
1434 }
1435}
1436
1449HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1450{
1451 /* Check that a Rx process is not already ongoing */
1452 if (huart->RxState == HAL_UART_STATE_READY)
1453 {
1454 if ((pData == NULL) || (Size == 0U))
1455 {
1456 return HAL_ERROR;
1457 }
1458
1459 /* Set Reception type to Standard reception */
1461
1462 return (UART_Start_Receive_DMA(huart, pData, Size));
1463 }
1464 else
1465 {
1466 return HAL_BUSY;
1467 }
1468}
1469
1477{
1478 uint32_t dmarequest = 0x00U;
1479
1480 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
1481 if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
1482 {
1483 /* Disable the UART DMA Tx request */
1484 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1485 }
1486
1487 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
1488 if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
1489 {
1490 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1491 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1492 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1493
1494 /* Disable the UART DMA Rx request */
1495 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1496 }
1497
1498 return HAL_OK;
1499}
1500
1508{
1509
1510 if (huart->gState == HAL_UART_STATE_BUSY_TX)
1511 {
1512 /* Enable the UART DMA Tx request */
1513 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1514 }
1515
1516 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1517 {
1518 /* Clear the Overrun flag before resuming the Rx transfer*/
1520
1521 /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
1522 if (huart->Init.Parity != UART_PARITY_NONE)
1523 {
1524 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1525 }
1526 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1527
1528 /* Enable the UART DMA Rx request */
1529 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1530 }
1531
1532 return HAL_OK;
1533}
1534
1542{
1543 uint32_t dmarequest = 0x00U;
1544 /* The Lock is not implemented on this API to allow the user application
1545 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
1546 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
1547 and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
1548 */
1549
1550 /* Stop UART DMA Tx request if ongoing */
1551 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
1552 if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
1553 {
1554 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1555
1556 /* Abort the UART DMA Tx stream */
1557 if (huart->hdmatx != NULL)
1558 {
1559 HAL_DMA_Abort(huart->hdmatx);
1560 }
1561 UART_EndTxTransfer(huart);
1562 }
1563
1564 /* Stop UART DMA Rx request if ongoing */
1565 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
1566 if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
1567 {
1568 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1569
1570 /* Abort the UART DMA Rx stream */
1571 if (huart->hdmarx != NULL)
1572 {
1573 HAL_DMA_Abort(huart->hdmarx);
1574 }
1575 UART_EndRxTransfer(huart);
1576 }
1577
1578 return HAL_OK;
1579}
1580
1596HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
1597 uint32_t Timeout)
1598{
1599 uint8_t *pdata8bits;
1600 uint16_t *pdata16bits;
1601 uint32_t tickstart;
1602
1603 /* Check that a Rx process is not already ongoing */
1604 if (huart->RxState == HAL_UART_STATE_READY)
1605 {
1606 if ((pData == NULL) || (Size == 0U))
1607 {
1608 return HAL_ERROR;
1609 }
1610
1615
1616 /* Init tickstart for timeout management */
1617 tickstart = HAL_GetTick();
1618
1619 huart->RxXferSize = Size;
1620 huart->RxXferCount = Size;
1621
1622 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1623 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1624 {
1625 pdata8bits = NULL;
1626 pdata16bits = (uint16_t *) pData;
1627 }
1628 else
1629 {
1630 pdata8bits = pData;
1631 pdata16bits = NULL;
1632 }
1633
1634 /* Initialize output number of received elements */
1635 *RxLen = 0U;
1636
1637 /* as long as data have to be received */
1638 while (huart->RxXferCount > 0U)
1639 {
1640 /* Check if IDLE flag is set */
1642 {
1643 /* Clear IDLE flag in ISR */
1645
1646 /* If Set, but no data ever received, clear flag without exiting loop */
1647 /* If Set, and data has already been received, this means Idle Event is valid : End reception */
1648 if (*RxLen > 0U)
1649 {
1652
1653 return HAL_OK;
1654 }
1655 }
1656
1657 /* Check if RXNE flag is set */
1659 {
1660 if (pdata8bits == NULL)
1661 {
1662 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
1663 pdata16bits++;
1664 }
1665 else
1666 {
1667 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
1668 {
1669 *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
1670 }
1671 else
1672 {
1673 *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
1674 }
1675
1676 pdata8bits++;
1677 }
1678 /* Increment number of received elements */
1679 *RxLen += 1U;
1680 huart->RxXferCount--;
1681 }
1682
1683 /* Check for the Timeout */
1684 if (Timeout != HAL_MAX_DELAY)
1685 {
1686 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1687 {
1689
1690 return HAL_TIMEOUT;
1691 }
1692 }
1693 }
1694
1695 /* Set number of received elements in output parameter : RxLen */
1696 *RxLen = huart->RxXferSize - huart->RxXferCount;
1697 /* At end of Rx process, restore huart->RxState to Ready */
1699
1700 return HAL_OK;
1701 }
1702 else
1703 {
1704 return HAL_BUSY;
1705 }
1706}
1707
1721HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1722{
1723 HAL_StatusTypeDef status;
1724
1725 /* Check that a Rx process is not already ongoing */
1726 if (huart->RxState == HAL_UART_STATE_READY)
1727 {
1728 if ((pData == NULL) || (Size == 0U))
1729 {
1730 return HAL_ERROR;
1731 }
1732
1733 /* Set Reception type to reception till IDLE Event*/
1736
1737 status = UART_Start_Receive_IT(huart, pData, Size);
1738
1739 /* Check Rx process has been successfully started */
1740 if (status == HAL_OK)
1741 {
1743 {
1745 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
1746 }
1747 else
1748 {
1749 /* In case of errors already pending when reception is started,
1750 Interrupts may have already been raised and lead to reception abortion.
1751 (Overrun error for instance).
1752 In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
1753 status = HAL_ERROR;
1754 }
1755 }
1756
1757 return status;
1758 }
1759 else
1760 {
1761 return HAL_BUSY;
1762 }
1763}
1764
1781HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1782{
1783 HAL_StatusTypeDef status;
1784
1785 /* Check that a Rx process is not already ongoing */
1786 if (huart->RxState == HAL_UART_STATE_READY)
1787 {
1788 if ((pData == NULL) || (Size == 0U))
1789 {
1790 return HAL_ERROR;
1791 }
1792
1793 /* Set Reception type to reception till IDLE Event*/
1796
1797 status = UART_Start_Receive_DMA(huart, pData, Size);
1798
1799 /* Check Rx process has been successfully started */
1801 {
1803 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
1804 }
1805 else
1806 {
1807 /* In case of errors already pending when reception is started,
1808 Interrupts may have already been raised and lead to reception abortion.
1809 (Overrun error for instance).
1810 In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
1811 status = HAL_ERROR;
1812 }
1813
1814 return status;
1815 }
1816 else
1817 {
1818 return HAL_BUSY;
1819 }
1820}
1821
1847{
1848 /* Return Rx Event type value, as stored in UART handle */
1849 return(huart->RxEventType);
1850}
1851
1865{
1866 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1867 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1868 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1869
1870 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1872 {
1873 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1874 }
1875
1876 /* Disable the UART DMA Tx request if enabled */
1877 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1878 {
1879 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1880
1881 /* Abort the UART DMA Tx stream: use blocking DMA Abort API (no callback) */
1882 if (huart->hdmatx != NULL)
1883 {
1884 /* Set the UART DMA Abort callback to Null.
1885 No call back execution at end of DMA abort procedure */
1886 huart->hdmatx->XferAbortCallback = NULL;
1887
1888 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1889 {
1891 {
1892 /* Set error code to DMA */
1894
1895 return HAL_TIMEOUT;
1896 }
1897 }
1898 }
1899 }
1900
1901 /* Disable the UART DMA Rx request if enabled */
1902 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1903 {
1904 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1905
1906 /* Abort the UART DMA Rx stream: use blocking DMA Abort API (no callback) */
1907 if (huart->hdmarx != NULL)
1908 {
1909 /* Set the UART DMA Abort callback to Null.
1910 No call back execution at end of DMA abort procedure */
1911 huart->hdmarx->XferAbortCallback = NULL;
1912
1913 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1914 {
1916 {
1917 /* Set error code to DMA */
1919
1920 return HAL_TIMEOUT;
1921 }
1922 }
1923 }
1924 }
1925
1926 /* Reset Tx and Rx transfer counters */
1927 huart->TxXferCount = 0x00U;
1928 huart->RxXferCount = 0x00U;
1929
1930 /* Reset ErrorCode */
1932
1933 /* Restore huart->RxState and huart->gState to Ready */
1937
1938 return HAL_OK;
1939}
1940
1954{
1955 /* Disable TXEIE and TCIE interrupts */
1956 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
1957
1958 /* Disable the UART DMA Tx request if enabled */
1959 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1960 {
1961 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1962
1963 /* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */
1964 if (huart->hdmatx != NULL)
1965 {
1966 /* Set the UART DMA Abort callback to Null.
1967 No call back execution at end of DMA abort procedure */
1968 huart->hdmatx->XferAbortCallback = NULL;
1969
1970 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1971 {
1973 {
1974 /* Set error code to DMA */
1976
1977 return HAL_TIMEOUT;
1978 }
1979 }
1980 }
1981 }
1982
1983 /* Reset Tx transfer counter */
1984 huart->TxXferCount = 0x00U;
1985
1986 /* Restore huart->gState to Ready */
1988
1989 return HAL_OK;
1990}
1991
2005{
2006 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2007 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2008 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2009
2010 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
2012 {
2013 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
2014 }
2015
2016 /* Disable the UART DMA Rx request if enabled */
2017 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2018 {
2019 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2020
2021 /* Abort the UART DMA Rx stream : use blocking DMA Abort API (no callback) */
2022 if (huart->hdmarx != NULL)
2023 {
2024 /* Set the UART DMA Abort callback to Null.
2025 No call back execution at end of DMA abort procedure */
2026 huart->hdmarx->XferAbortCallback = NULL;
2027
2028 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
2029 {
2031 {
2032 /* Set error code to DMA */
2034
2035 return HAL_TIMEOUT;
2036 }
2037 }
2038 }
2039 }
2040
2041 /* Reset Rx transfer counter */
2042 huart->RxXferCount = 0x00U;
2043
2044 /* Restore huart->RxState to Ready */
2047
2048 return HAL_OK;
2049}
2050
2066{
2067 uint32_t AbortCplt = 0x01U;
2068
2069 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2070 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
2071 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2072
2073 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
2075 {
2076 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
2077 }
2078
2079 /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
2080 before any call to DMA Abort functions */
2081 /* DMA Tx Handle is valid */
2082 if (huart->hdmatx != NULL)
2083 {
2084 /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
2085 Otherwise, set it to NULL */
2086 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2087 {
2088 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
2089 }
2090 else
2091 {
2092 huart->hdmatx->XferAbortCallback = NULL;
2093 }
2094 }
2095 /* DMA Rx Handle is valid */
2096 if (huart->hdmarx != NULL)
2097 {
2098 /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
2099 Otherwise, set it to NULL */
2100 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2101 {
2102 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
2103 }
2104 else
2105 {
2106 huart->hdmarx->XferAbortCallback = NULL;
2107 }
2108 }
2109
2110 /* Disable the UART DMA Tx request if enabled */
2111 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2112 {
2113 /* Disable DMA Tx at UART level */
2114 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2115
2116 /* Abort the UART DMA Tx stream : use non blocking DMA Abort API (callback) */
2117 if (huart->hdmatx != NULL)
2118 {
2119 /* UART Tx DMA Abort callback has already been initialised :
2120 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2121
2122 /* Abort DMA TX */
2123 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2124 {
2125 huart->hdmatx->XferAbortCallback = NULL;
2126 }
2127 else
2128 {
2129 AbortCplt = 0x00U;
2130 }
2131 }
2132 }
2133
2134 /* Disable the UART DMA Rx request if enabled */
2135 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2136 {
2137 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2138
2139 /* Abort the UART DMA Rx stream : use non blocking DMA Abort API (callback) */
2140 if (huart->hdmarx != NULL)
2141 {
2142 /* UART Rx DMA Abort callback has already been initialised :
2143 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2144
2145 /* Abort DMA RX */
2146 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2147 {
2148 huart->hdmarx->XferAbortCallback = NULL;
2149 AbortCplt = 0x01U;
2150 }
2151 else
2152 {
2153 AbortCplt = 0x00U;
2154 }
2155 }
2156 }
2157
2158 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
2159 if (AbortCplt == 0x01U)
2160 {
2161 /* Reset Tx and Rx transfer counters */
2162 huart->TxXferCount = 0x00U;
2163 huart->RxXferCount = 0x00U;
2164
2165 /* Reset ErrorCode */
2167
2168 /* Restore huart->gState and huart->RxState to Ready */
2172
2173 /* As no DMA to be aborted, call directly user Abort complete callback */
2174#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2175 /* Call registered Abort complete callback */
2176 huart->AbortCpltCallback(huart);
2177#else
2178 /* Call legacy weak Abort complete callback */
2180#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2181 }
2182
2183 return HAL_OK;
2184}
2185
2201{
2202 /* Disable TXEIE and TCIE interrupts */
2203 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
2204
2205 /* Disable the UART DMA Tx request if enabled */
2206 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2207 {
2208 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2209
2210 /* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */
2211 if (huart->hdmatx != NULL)
2212 {
2213 /* Set the UART DMA Abort callback :
2214 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2215 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2216
2217 /* Abort DMA TX */
2218 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2219 {
2220 /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
2221 huart->hdmatx->XferAbortCallback(huart->hdmatx);
2222 }
2223 }
2224 else
2225 {
2226 /* Reset Tx transfer counter */
2227 huart->TxXferCount = 0x00U;
2228
2229 /* Restore huart->gState to Ready */
2231
2232 /* As no DMA to be aborted, call directly user Abort complete callback */
2233#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2234 /* Call registered Abort Transmit Complete Callback */
2235 huart->AbortTransmitCpltCallback(huart);
2236#else
2237 /* Call legacy weak Abort Transmit Complete Callback */
2239#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2240 }
2241 }
2242 else
2243 {
2244 /* Reset Tx transfer counter */
2245 huart->TxXferCount = 0x00U;
2246
2247 /* Restore huart->gState to Ready */
2249
2250 /* As no DMA to be aborted, call directly user Abort complete callback */
2251#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2252 /* Call registered Abort Transmit Complete Callback */
2253 huart->AbortTransmitCpltCallback(huart);
2254#else
2255 /* Call legacy weak Abort Transmit Complete Callback */
2257#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2258 }
2259
2260 return HAL_OK;
2261}
2262
2278{
2279 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2280 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2281 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2282
2283 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
2285 {
2286 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
2287 }
2288
2289 /* Disable the UART DMA Rx request if enabled */
2290 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2291 {
2292 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2293
2294 /* Abort the UART DMA Rx stream : use blocking DMA Abort API (no callback) */
2295 if (huart->hdmarx != NULL)
2296 {
2297 /* Set the UART DMA Abort callback :
2298 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2299 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2300
2301 /* Abort DMA RX */
2302 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2303 {
2304 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2305 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2306 }
2307 }
2308 else
2309 {
2310 /* Reset Rx transfer counter */
2311 huart->RxXferCount = 0x00U;
2312
2313 /* Restore huart->RxState to Ready */
2316
2317 /* As no DMA to be aborted, call directly user Abort complete callback */
2318#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2319 /* Call registered Abort Receive Complete Callback */
2320 huart->AbortReceiveCpltCallback(huart);
2321#else
2322 /* Call legacy weak Abort Receive Complete Callback */
2324#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2325 }
2326 }
2327 else
2328 {
2329 /* Reset Rx transfer counter */
2330 huart->RxXferCount = 0x00U;
2331
2332 /* Restore huart->RxState to Ready */
2335
2336 /* As no DMA to be aborted, call directly user Abort complete callback */
2337#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2338 /* Call registered Abort Receive Complete Callback */
2339 huart->AbortReceiveCpltCallback(huart);
2340#else
2341 /* Call legacy weak Abort Receive Complete Callback */
2343#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2344 }
2345
2346 return HAL_OK;
2347}
2348
2356{
2357 uint32_t isrflags = READ_REG(huart->Instance->SR);
2358 uint32_t cr1its = READ_REG(huart->Instance->CR1);
2359 uint32_t cr3its = READ_REG(huart->Instance->CR3);
2360 uint32_t errorflags = 0x00U;
2361 uint32_t dmarequest = 0x00U;
2362
2363 /* If no error occurs */
2364 errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
2365 if (errorflags == RESET)
2366 {
2367 /* UART in mode Receiver -------------------------------------------------*/
2368 if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
2369 {
2370 UART_Receive_IT(huart);
2371 return;
2372 }
2373 }
2374
2375 /* If some errors occur */
2376 if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET)
2377 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
2378 {
2379 /* UART parity error interrupt occurred ----------------------------------*/
2380 if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
2381 {
2382 huart->ErrorCode |= HAL_UART_ERROR_PE;
2383 }
2384
2385 /* UART noise error interrupt occurred -----------------------------------*/
2386 if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
2387 {
2388 huart->ErrorCode |= HAL_UART_ERROR_NE;
2389 }
2390
2391 /* UART frame error interrupt occurred -----------------------------------*/
2392 if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
2393 {
2394 huart->ErrorCode |= HAL_UART_ERROR_FE;
2395 }
2396
2397 /* UART Over-Run interrupt occurred --------------------------------------*/
2398 if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET)
2399 || ((cr3its & USART_CR3_EIE) != RESET)))
2400 {
2401 huart->ErrorCode |= HAL_UART_ERROR_ORE;
2402 }
2403
2404 /* Call UART Error Call back function if need be --------------------------*/
2405 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2406 {
2407 /* UART in mode Receiver -----------------------------------------------*/
2408 if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
2409 {
2410 UART_Receive_IT(huart);
2411 }
2412
2413 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
2414 consider error as blocking */
2415 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
2416 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
2417 {
2418 /* Blocking error : transfer is aborted
2419 Set the UART state ready to be able to start again the process,
2420 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
2421 UART_EndRxTransfer(huart);
2422
2423 /* Disable the UART DMA Rx request if enabled */
2424 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2425 {
2426 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2427
2428 /* Abort the UART DMA Rx stream */
2429 if (huart->hdmarx != NULL)
2430 {
2431 /* Set the UART DMA Abort callback :
2432 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
2433 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2434 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2435 {
2436 /* Call Directly XferAbortCallback function in case of error */
2437 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2438 }
2439 }
2440 else
2441 {
2442 /* Call user error callback */
2443#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2444 /*Call registered error callback*/
2445 huart->ErrorCallback(huart);
2446#else
2447 /*Call legacy weak error callback*/
2449#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2450 }
2451 }
2452 else
2453 {
2454 /* Call user error callback */
2455#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2456 /*Call registered error callback*/
2457 huart->ErrorCallback(huart);
2458#else
2459 /*Call legacy weak error callback*/
2461#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2462 }
2463 }
2464 else
2465 {
2466 /* Non Blocking error : transfer could go on.
2467 Error is notified to user through user error callback */
2468#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2469 /*Call registered error callback*/
2470 huart->ErrorCallback(huart);
2471#else
2472 /*Call legacy weak error callback*/
2474#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2475
2477 }
2478 }
2479 return;
2480 } /* End if some error occurs */
2481
2482 /* Check current reception Mode :
2483 If Reception till IDLE event has been selected : */
2485 && ((isrflags & USART_SR_IDLE) != 0U)
2486 && ((cr1its & USART_CR1_IDLEIE) != 0U))
2487 {
2489
2490 /* Check if DMA mode is enabled in UART */
2491 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2492 {
2493 /* DMA mode enabled */
2494 /* Check received length : If all expected data are received, do nothing,
2495 (DMA cplt callback will be called).
2496 Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2497 uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
2498 if ((nb_remaining_rx_data > 0U)
2499 && (nb_remaining_rx_data < huart->RxXferSize))
2500 {
2501 /* Reception is not complete */
2502 huart->RxXferCount = nb_remaining_rx_data;
2503
2504 /* In Normal mode, end DMA xfer and HAL UART Rx process*/
2505 if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
2506 {
2507 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
2508 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
2509 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2510
2511 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
2512 in the UART CR3 register */
2513 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2514
2515 /* At end of Rx process, restore huart->RxState to Ready */
2518
2519 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2520
2521 /* Last bytes received, so no need as the abort is immediate */
2522 (void)HAL_DMA_Abort(huart->hdmarx);
2523 }
2524
2525 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
2526 In this case, Rx Event type is Idle Event */
2528
2529#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2530 /*Call registered Rx Event callback*/
2531 huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2532#else
2533 /*Call legacy weak Rx Event callback*/
2534 HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2535#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2536 }
2537 else
2538 {
2539 /* If DMA is in Circular mode, Idle event is to be reported to user
2540 even if occurring after a Transfer Complete event from DMA */
2541 if (nb_remaining_rx_data == huart->RxXferSize)
2542 {
2543 if (huart->hdmarx->Init.Mode == DMA_CIRCULAR)
2544 {
2545 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
2546 In this case, Rx Event type is Idle Event */
2548
2549#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2550 /*Call registered Rx Event callback*/
2551 huart->RxEventCallback(huart, huart->RxXferSize);
2552#else
2553 /*Call legacy weak Rx Event callback*/
2555#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2556 }
2557 }
2558 }
2559 return;
2560 }
2561 else
2562 {
2563 /* DMA mode not enabled */
2564 /* Check received length : If all expected data are received, do nothing.
2565 Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2566 uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
2567 if ((huart->RxXferCount > 0U)
2568 && (nb_rx_data > 0U))
2569 {
2570 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
2571 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2572
2573 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
2574 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2575
2576 /* Rx process is completed, restore huart->RxState to Ready */
2579
2580 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2581
2582 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
2583 In this case, Rx Event type is Idle Event */
2585
2586#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2587 /*Call registered Rx complete callback*/
2588 huart->RxEventCallback(huart, nb_rx_data);
2589#else
2590 /*Call legacy weak Rx Event callback*/
2591 HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
2592#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2593 }
2594 return;
2595 }
2596 }
2597
2598 /* UART in mode Transmitter ------------------------------------------------*/
2599 if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
2600 {
2601 UART_Transmit_IT(huart);
2602 return;
2603 }
2604
2605 /* UART in mode Transmitter end --------------------------------------------*/
2606 if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
2607 {
2608 UART_EndTransmit_IT(huart);
2609 return;
2610 }
2611}
2612
2620{
2621 /* Prevent unused argument(s) compilation warning */
2622 UNUSED(huart);
2623 /* NOTE: This function should not be modified, when the callback is needed,
2624 the HAL_UART_TxCpltCallback could be implemented in the user file
2625 */
2626}
2627
2635{
2636 /* Prevent unused argument(s) compilation warning */
2637 UNUSED(huart);
2638 /* NOTE: This function should not be modified, when the callback is needed,
2639 the HAL_UART_TxHalfCpltCallback could be implemented in the user file
2640 */
2641}
2642
2650{
2651 /* Prevent unused argument(s) compilation warning */
2652 UNUSED(huart);
2653 /* NOTE: This function should not be modified, when the callback is needed,
2654 the HAL_UART_RxCpltCallback could be implemented in the user file
2655 */
2656}
2657
2665{
2666 /* Prevent unused argument(s) compilation warning */
2667 UNUSED(huart);
2668 /* NOTE: This function should not be modified, when the callback is needed,
2669 the HAL_UART_RxHalfCpltCallback could be implemented in the user file
2670 */
2671}
2672
2680{
2681 /* Prevent unused argument(s) compilation warning */
2682 UNUSED(huart);
2683 /* NOTE: This function should not be modified, when the callback is needed,
2684 the HAL_UART_ErrorCallback could be implemented in the user file
2685 */
2686}
2687
2694{
2695 /* Prevent unused argument(s) compilation warning */
2696 UNUSED(huart);
2697
2698 /* NOTE : This function should not be modified, when the callback is needed,
2699 the HAL_UART_AbortCpltCallback can be implemented in the user file.
2700 */
2701}
2702
2709{
2710 /* Prevent unused argument(s) compilation warning */
2711 UNUSED(huart);
2712
2713 /* NOTE : This function should not be modified, when the callback is needed,
2714 the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
2715 */
2716}
2717
2724{
2725 /* Prevent unused argument(s) compilation warning */
2726 UNUSED(huart);
2727
2728 /* NOTE : This function should not be modified, when the callback is needed,
2729 the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
2730 */
2731}
2732
2740__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
2741{
2742 /* Prevent unused argument(s) compilation warning */
2743 UNUSED(huart);
2744 UNUSED(Size);
2745
2746 /* NOTE : This function should not be modified, when the callback is needed,
2747 the HAL_UARTEx_RxEventCallback can be implemented in the user file.
2748 */
2749}
2750
2754
2773
2781{
2782 /* Check the parameters */
2783 assert_param(IS_UART_INSTANCE(huart->Instance));
2784
2785 /* Process Locked */
2786 __HAL_LOCK(huart);
2787
2788 huart->gState = HAL_UART_STATE_BUSY;
2789
2790 /* Send break characters */
2791 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
2792
2794
2795 /* Process Unlocked */
2796 __HAL_UNLOCK(huart);
2797
2798 return HAL_OK;
2799}
2800
2808{
2809 /* Check the parameters */
2810 assert_param(IS_UART_INSTANCE(huart->Instance));
2811
2812 /* Process Locked */
2813 __HAL_LOCK(huart);
2814
2815 huart->gState = HAL_UART_STATE_BUSY;
2816
2817 /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
2818 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
2819
2822
2823 /* Process Unlocked */
2824 __HAL_UNLOCK(huart);
2825
2826 return HAL_OK;
2827}
2828
2836{
2837 /* Check the parameters */
2838 assert_param(IS_UART_INSTANCE(huart->Instance));
2839
2840 /* Process Locked */
2841 __HAL_LOCK(huart);
2842
2843 huart->gState = HAL_UART_STATE_BUSY;
2844
2845 /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
2846 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
2847
2850
2851 /* Process Unlocked */
2852 __HAL_UNLOCK(huart);
2853
2854 return HAL_OK;
2855}
2856
2864{
2865 uint32_t tmpreg = 0x00U;
2866
2867 /* Process Locked */
2868 __HAL_LOCK(huart);
2869
2870 huart->gState = HAL_UART_STATE_BUSY;
2871
2872 /*-------------------------- USART CR1 Configuration -----------------------*/
2873 tmpreg = huart->Instance->CR1;
2874
2875 /* Clear TE and RE bits */
2876 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
2877
2878 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
2879 tmpreg |= (uint32_t)USART_CR1_TE;
2880
2881 /* Write to USART CR1 */
2882 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
2883
2885
2886 /* Process Unlocked */
2887 __HAL_UNLOCK(huart);
2888
2889 return HAL_OK;
2890}
2891
2899{
2900 uint32_t tmpreg = 0x00U;
2901
2902 /* Process Locked */
2903 __HAL_LOCK(huart);
2904
2905 huart->gState = HAL_UART_STATE_BUSY;
2906
2907 /*-------------------------- USART CR1 Configuration -----------------------*/
2908 tmpreg = huart->Instance->CR1;
2909
2910 /* Clear TE and RE bits */
2911 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
2912
2913 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
2914 tmpreg |= (uint32_t)USART_CR1_RE;
2915
2916 /* Write to USART CR1 */
2917 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
2918
2920
2921 /* Process Unlocked */
2922 __HAL_UNLOCK(huart);
2923
2924 return HAL_OK;
2925}
2926
2930
2948
2956{
2957 uint32_t temp1 = 0x00U, temp2 = 0x00U;
2958 temp1 = huart->gState;
2959 temp2 = huart->RxState;
2960
2961 return (HAL_UART_StateTypeDef)(temp1 | temp2);
2962}
2963
2970uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
2971{
2972 return huart->ErrorCode;
2973}
2974
2978
2982
2986
2992#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2993void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
2994{
2995 /* Init the UART Callback settings */
2996 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
2997 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
2998 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
2999 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
3000 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
3001 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
3002 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
3003 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
3004 huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */
3005
3006}
3007#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3008
3015static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3016{
3017 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3018 /* DMA Normal mode*/
3019 if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
3020 {
3021 huart->TxXferCount = 0x00U;
3022
3023 /* Disable the DMA transfer for transmit request by setting the DMAT bit
3024 in the UART CR3 register */
3025 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3026
3027 /* Enable the UART Transmit Complete Interrupt */
3028 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3029
3030 }
3031 /* DMA Circular mode */
3032 else
3033 {
3034#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3035 /*Call registered Tx complete callback*/
3036 huart->TxCpltCallback(huart);
3037#else
3038 /*Call legacy weak Tx complete callback*/
3040#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3041 }
3042}
3043
3050static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3051{
3052 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3053
3054#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3055 /*Call registered Tx complete callback*/
3056 huart->TxHalfCpltCallback(huart);
3057#else
3058 /*Call legacy weak Tx complete callback*/
3060#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3061}
3062
3069static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3070{
3071 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3072
3073 /* DMA Normal mode*/
3074 if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
3075 {
3076 huart->RxXferCount = 0U;
3077
3078 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3079 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3080 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3081
3082 /* Disable the DMA transfer for the receiver request by setting the DMAR bit
3083 in the UART CR3 register */
3084 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3085
3086 /* At end of Rx process, restore huart->RxState to Ready */
3088
3089 /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */
3091 {
3092 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3093 }
3094 }
3095
3096 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
3097 In this case, Rx Event type is Transfer Complete */
3099
3100 /* Check current reception Mode :
3101 If Reception till IDLE event has been selected : use Rx Event callback */
3103 {
3104#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3105 /*Call registered Rx Event callback*/
3106 huart->RxEventCallback(huart, huart->RxXferSize);
3107#else
3108 /*Call legacy weak Rx Event callback*/
3110#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3111 }
3112 else
3113 {
3114 /* In other cases : use Rx Complete callback */
3115#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3116 /*Call registered Rx complete callback*/
3117 huart->RxCpltCallback(huart);
3118#else
3119 /*Call legacy weak Rx complete callback*/
3121#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3122 }
3123}
3124
3131static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3132{
3133 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3134
3135 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
3136 In this case, Rx Event type is Half Transfer */
3138
3139 /* Check current reception Mode :
3140 If Reception till IDLE event has been selected : use Rx Event callback */
3142 {
3143#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3144 /*Call registered Rx Event callback*/
3145 huart->RxEventCallback(huart, huart->RxXferSize / 2U);
3146#else
3147 /*Call legacy weak Rx Event callback*/
3148 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
3149#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3150 }
3151 else
3152 {
3153 /* In other cases : use Rx Half Complete callback */
3154#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3155 /*Call registered Rx Half complete callback*/
3156 huart->RxHalfCpltCallback(huart);
3157#else
3158 /*Call legacy weak Rx Half complete callback*/
3160#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3161 }
3162}
3163
3170static void UART_DMAError(DMA_HandleTypeDef *hdma)
3171{
3172 uint32_t dmarequest = 0x00U;
3173 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3174
3175 /* Stop UART DMA Tx request if ongoing */
3176 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
3177 if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
3178 {
3179 huart->TxXferCount = 0x00U;
3180 UART_EndTxTransfer(huart);
3181 }
3182
3183 /* Stop UART DMA Rx request if ongoing */
3184 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
3185 if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
3186 {
3187 huart->RxXferCount = 0x00U;
3188 UART_EndRxTransfer(huart);
3189 }
3190
3191 huart->ErrorCode |= HAL_UART_ERROR_DMA;
3192#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3193 /*Call registered error callback*/
3194 huart->ErrorCallback(huart);
3195#else
3196 /*Call legacy weak error callback*/
3198#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3199}
3200
3212static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
3213 uint32_t Tickstart, uint32_t Timeout)
3214{
3215 /* Wait until flag is set */
3216 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3217 {
3218 /* Check for the Timeout */
3219 if (Timeout != HAL_MAX_DELAY)
3220 {
3221 if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3222 {
3223
3224 return HAL_TIMEOUT;
3225 }
3226
3227 if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
3228 {
3229 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
3230 {
3231 /* Clear Overrun Error flag*/
3233
3234 /* Blocking error : transfer is aborted
3235 Set the UART state ready to be able to start again the process,
3236 Disable Rx Interrupts if ongoing */
3237 UART_EndRxTransfer(huart);
3238
3240
3241 /* Process Unlocked */
3242 __HAL_UNLOCK(huart);
3243
3244 return HAL_ERROR;
3245 }
3246 }
3247 }
3248 }
3249 return HAL_OK;
3250}
3251
3263HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3264{
3265 huart->pRxBuffPtr = pData;
3266 huart->RxXferSize = Size;
3267 huart->RxXferCount = Size;
3268
3271
3272 if (huart->Init.Parity != UART_PARITY_NONE)
3273 {
3274 /* Enable the UART Parity Error Interrupt */
3276 }
3277
3278 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3280
3281 /* Enable the UART Data Register not empty Interrupt */
3283
3284 return HAL_OK;
3285}
3286
3298HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3299{
3300 uint32_t *tmp;
3301
3302 huart->pRxBuffPtr = pData;
3303 huart->RxXferSize = Size;
3304
3307
3308 /* Set the UART DMA transfer complete callback */
3309 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
3310
3311 /* Set the UART DMA Half transfer complete callback */
3312 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
3313
3314 /* Set the DMA error callback */
3315 huart->hdmarx->XferErrorCallback = UART_DMAError;
3316
3317 /* Set the DMA abort callback */
3318 huart->hdmarx->XferAbortCallback = NULL;
3319
3320 /* Enable the DMA stream */
3321 tmp = (uint32_t *)&pData;
3322 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size) != HAL_OK)
3323 {
3324 /* Set error code to DMA */
3326
3327 /* Restore huart->RxState to ready */
3329
3330 return HAL_ERROR;
3331 }
3332 /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */
3334
3335 if (huart->Init.Parity != UART_PARITY_NONE)
3336 {
3337 /* Enable the UART Parity Error Interrupt */
3338 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3339 }
3340
3341 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3342 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3343
3344 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
3345 in the UART CR3 register */
3346 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3347
3348 return HAL_OK;
3349}
3350
3356static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3357{
3358 /* Disable TXEIE and TCIE interrupts */
3359 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
3360
3361 /* At end of Tx process, restore huart->gState to Ready */
3363}
3364
3370static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3371{
3372 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3373 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
3374 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3375
3376 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
3378 {
3379 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3380 }
3381
3382 /* At end of Rx process, restore huart->RxState to Ready */
3385}
3386
3394static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
3395{
3396 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3397 huart->RxXferCount = 0x00U;
3398
3399#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3400 /*Call registered error callback*/
3401 huart->ErrorCallback(huart);
3402#else
3403 /*Call legacy weak error callback*/
3405#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3406}
3407
3417static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
3418{
3419 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3420
3421 huart->hdmatx->XferAbortCallback = NULL;
3422
3423 /* Check if an Abort process is still ongoing */
3424 if (huart->hdmarx != NULL)
3425 {
3426 if (huart->hdmarx->XferAbortCallback != NULL)
3427 {
3428 return;
3429 }
3430 }
3431
3432 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3433 huart->TxXferCount = 0x00U;
3434 huart->RxXferCount = 0x00U;
3435
3436 /* Reset ErrorCode */
3438
3439 /* Restore huart->gState and huart->RxState to Ready */
3443
3444 /* Call user Abort complete callback */
3445#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3446 /* Call registered Abort complete callback */
3447 huart->AbortCpltCallback(huart);
3448#else
3449 /* Call legacy weak Abort complete callback */
3451#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3452}
3453
3463static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
3464{
3465 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3466
3467 huart->hdmarx->XferAbortCallback = NULL;
3468
3469 /* Check if an Abort process is still ongoing */
3470 if (huart->hdmatx != NULL)
3471 {
3472 if (huart->hdmatx->XferAbortCallback != NULL)
3473 {
3474 return;
3475 }
3476 }
3477
3478 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3479 huart->TxXferCount = 0x00U;
3480 huart->RxXferCount = 0x00U;
3481
3482 /* Reset ErrorCode */
3484
3485 /* Restore huart->gState and huart->RxState to Ready */
3489
3490 /* Call user Abort complete callback */
3491#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3492 /* Call registered Abort complete callback */
3493 huart->AbortCpltCallback(huart);
3494#else
3495 /* Call legacy weak Abort complete callback */
3497#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3498}
3499
3509static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3510{
3511 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3512
3513 huart->TxXferCount = 0x00U;
3514
3515 /* Restore huart->gState to Ready */
3517
3518 /* Call user Abort complete callback */
3519#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3520 /* Call registered Abort Transmit Complete Callback */
3521 huart->AbortTransmitCpltCallback(huart);
3522#else
3523 /* Call legacy weak Abort Transmit Complete Callback */
3525#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3526}
3527
3537static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3538{
3539 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3540
3541 huart->RxXferCount = 0x00U;
3542
3543 /* Restore huart->RxState to Ready */
3546
3547 /* Call user Abort complete callback */
3548#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3549 /* Call registered Abort Receive Complete Callback */
3550 huart->AbortReceiveCpltCallback(huart);
3551#else
3552 /* Call legacy weak Abort Receive Complete Callback */
3554#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3555}
3556
3563static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
3564{
3565 const uint16_t *tmp;
3566
3567 /* Check that a Tx process is ongoing */
3568 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3569 {
3570 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3571 {
3572 tmp = (const uint16_t *) huart->pTxBuffPtr;
3573 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
3574 huart->pTxBuffPtr += 2U;
3575 }
3576 else
3577 {
3578 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
3579 }
3580
3581 if (--huart->TxXferCount == 0U)
3582 {
3583 /* Disable the UART Transmit Data Register Empty Interrupt */
3585
3586 /* Enable the UART Transmit Complete Interrupt */
3588 }
3589 return HAL_OK;
3590 }
3591 else
3592 {
3593 return HAL_BUSY;
3594 }
3595}
3596
3603static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
3604{
3605 /* Disable the UART Transmit Complete Interrupt */
3607
3608 /* Tx process is ended, restore huart->gState to Ready */
3610
3611#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3612 /*Call registered Tx complete callback*/
3613 huart->TxCpltCallback(huart);
3614#else
3615 /*Call legacy weak Tx complete callback*/
3617#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3618
3619 return HAL_OK;
3620}
3621
3628static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
3629{
3630 uint8_t *pdata8bits = NULL;
3631 uint16_t *pdata16bits = NULL;
3632
3633 /* Check that a Rx process is ongoing */
3634 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
3635 {
3636 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3637 {
3638 /* Unused pdata8bits */
3639 UNUSED(pdata8bits);
3640 pdata16bits = (uint16_t *) huart->pRxBuffPtr;
3641 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
3642 huart->pRxBuffPtr += 2U;
3643 }
3644 else
3645 {
3646 pdata8bits = (uint8_t *) huart->pRxBuffPtr;
3647 /* Unused pdata16bits */
3648 UNUSED(pdata16bits);
3649
3650 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
3651 {
3652 *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
3653 }
3654 else
3655 {
3656 *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
3657 }
3658 huart->pRxBuffPtr += 1U;
3659 }
3660
3661 if (--huart->RxXferCount == 0U)
3662 {
3663 /* Disable the UART Data Register not empty Interrupt */
3665
3666 /* Disable the UART Parity Error Interrupt */
3668
3669 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3671
3672 /* Rx process is completed, restore huart->RxState to Ready */
3674
3675 /* Initialize type of RxEvent to Transfer Complete */
3677
3678 /* Check current reception Mode :
3679 If Reception till IDLE event has been selected : */
3681 {
3682 /* Set reception type to Standard */
3684
3685 /* Disable IDLE interrupt */
3686 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3687
3688 /* Check if IDLE flag is set */
3690 {
3691 /* Clear IDLE flag in ISR */
3693 }
3694
3695#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3696 /*Call registered Rx Event callback*/
3697 huart->RxEventCallback(huart, huart->RxXferSize);
3698#else
3699 /*Call legacy weak Rx Event callback*/
3701#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3702 }
3703 else
3704 {
3705 /* Standard reception API called */
3706#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3707 /*Call registered Rx complete callback*/
3708 huart->RxCpltCallback(huart);
3709#else
3710 /*Call legacy weak Rx complete callback*/
3712#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3713 }
3714
3715 return HAL_OK;
3716 }
3717 return HAL_OK;
3718 }
3719 else
3720 {
3721 return HAL_BUSY;
3722 }
3723}
3724
3731static void UART_SetConfig(UART_HandleTypeDef *huart)
3732{
3733 uint32_t tmpreg;
3734 uint32_t pclk;
3735
3736 /* Check the parameters */
3741
3742 /*-------------------------- USART CR2 Configuration -----------------------*/
3743 /* Configure the UART Stop Bits: Set STOP[13:12] bits
3744 according to huart->Init.StopBits value */
3745 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
3746
3747 /*-------------------------- USART CR1 Configuration -----------------------*/
3748 /* Configure the UART Word Length, Parity and mode:
3749 Set the M bits according to huart->Init.WordLength value
3750 Set PCE and PS bits according to huart->Init.Parity value
3751 Set TE and RE bits according to huart->Init.Mode value
3752 Set OVER8 bit according to huart->Init.OverSampling value */
3753
3754 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
3755 MODIFY_REG(huart->Instance->CR1,
3756 (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
3757 tmpreg);
3758
3759 /*-------------------------- USART CR3 Configuration -----------------------*/
3760 /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
3761 MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
3762
3763
3764#if defined(USART6) && defined(UART9) && defined(UART10)
3765 if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10))
3766 {
3767 pclk = HAL_RCC_GetPCLK2Freq();
3768 }
3769#elif defined(USART6)
3770 if ((huart->Instance == USART1) || (huart->Instance == USART6))
3771 {
3772 pclk = HAL_RCC_GetPCLK2Freq();
3773 }
3774#else
3775 if (huart->Instance == USART1)
3776 {
3777 pclk = HAL_RCC_GetPCLK2Freq();
3778 }
3779#endif /* USART6 */
3780 else
3781 {
3782 pclk = HAL_RCC_GetPCLK1Freq();
3783 }
3784 /*-------------------------- USART BRR Configuration ---------------------*/
3786 {
3787 huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
3788 }
3789 else
3790 {
3791 huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
3792 }
3793}
3794
3798
3799#endif /* HAL_UART_MODULE_ENABLED */
3803
3807
#define HAL_DMA_ERROR_TIMEOUT
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
#define DMA_CIRCULAR
#define __HAL_DMA_GET_COUNTER(__HANDLE__)
Returns the number of remaining data units in the current DMAy Streamx transfer.
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
uint32_t HAL_RCC_GetPCLK1Freq(void)
uint32_t HAL_RCC_GetPCLK2Freq(void)
#define HAL_UART_ERROR_NONE
#define HAL_UART_ERROR_NE
#define HAL_UART_ERROR_DMA
#define HAL_UART_ERROR_PE
#define HAL_UART_ERROR_ORE
#define HAL_UART_ERROR_FE
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, uint32_t Timeout)
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart)
#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__)
Clears the UART IDLE pending flag.
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__)
Checks whether the specified UART flag is set or not.
#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__)
Disable the specified UART interrupt.
#define __HAL_UART_ENABLE(__HANDLE__)
Enable UART.
#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__)
Clears the specified UART pending flag.
#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__)
Clears the UART ORE pending flag.
#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__)
Enable the specified UART interrupt.
#define __HAL_UART_DISABLE(__HANDLE__)
Disable UART.
struct __UART_HandleTypeDef UART_HandleTypeDef
UART handle Structure definition.
uint32_t HAL_UART_RxEventTypeTypeDef
HAL UART Rx Event type definition.
HAL_UART_StateTypeDef
HAL UART State structures definition.
@ HAL_UART_STATE_RESET
@ HAL_UART_STATE_BUSY
@ HAL_UART_STATE_BUSY_TX
@ HAL_UART_STATE_READY
@ HAL_UART_STATE_BUSY_RX
#define UART_FLAG_ORE
#define UART_FLAG_IDLE
#define UART_FLAG_TC
#define UART_FLAG_RXNE
#define UART_FLAG_TXE
#define UART_HWCONTROL_NONE
#define UART_IT_TXE
#define UART_IT_PE
#define UART_IT_ERR
#define UART_IT_TC
#define UART_IT_RXNE
#define UART_OVERSAMPLING_8
#define UART_PARITY_NONE
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
#define IS_UART_LIN_WORD_LENGTH(LENGTH)
#define IS_UART_ADDRESS(ADDRESS)
#define IS_UART_STOPBITS(STOPBITS)
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)
#define IS_UART_WORD_LENGTH(LENGTH)
#define IS_UART_BAUDRATE(BAUDRATE)
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH)
#define IS_UART_WAKEUPMETHOD(WAKEUP)
#define IS_UART_MODE(MODE)
#define IS_UART_OVERSAMPLING(SAMPLING)
#define IS_UART_LIN_OVERSAMPLING(SAMPLING)
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_)
#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_)
#define IS_UART_PARITY(PARITY)
#define HAL_UART_RECEPTION_TOIDLE
#define HAL_UART_RECEPTION_STANDARD
#define HAL_UART_RXEVENT_HT
#define HAL_UART_RXEVENT_IDLE
#define HAL_UART_RXEVENT_TC
#define UART_WORDLENGTH_8B
#define UART_WORDLENGTH_9B
#define assert_param(expr)
This file contains all the functions prototypes for the HAL module driver.
#define HAL_IS_BIT_SET(REG, BIT)
HAL_StatusTypeDef
HAL Status structures definition.
@ HAL_TIMEOUT
@ HAL_ERROR
@ HAL_OK
@ HAL_BUSY
#define __HAL_UNLOCK(__HANDLE__)
#define HAL_MAX_DELAY
@ HAL_UNLOCKED
#define __HAL_LOCK(__HANDLE__)
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
DMA_Stream_TypeDef * Instance
volatile HAL_UART_RxEventTypeTypeDef RxEventType
volatile HAL_UART_StateTypeDef RxState
volatile HAL_UART_StateTypeDef gState
volatile uint32_t ErrorCode
volatile uint16_t TxXferCount
DMA_HandleTypeDef * hdmarx
volatile uint16_t RxXferCount
volatile HAL_UART_RxTypeTypeDef ReceptionType
DMA_HandleTypeDef * hdmatx