STM32F4xx HAL Driver master
STM32CubeF4 HAL / LL Drivers API Reference
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stm32f4xx_hal_fmpi2c.h
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1
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32F4xx_HAL_FMPI2C_H
21#define STM32F4xx_HAL_FMPI2C_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#if defined(FMPI2C_CR1_PE)
28/* Includes ------------------------------------------------------------------*/
29#include "stm32f4xx_hal_def.h"
30
34
38
39/* Exported types ------------------------------------------------------------*/
43
48typedef struct
49{
50 uint32_t Timing;
53
54 uint32_t OwnAddress1;
56
57 uint32_t AddressingMode;
59
60 uint32_t DualAddressMode;
62
63 uint32_t OwnAddress2;
65
66 uint32_t OwnAddress2Masks;
69
70 uint32_t GeneralCallMode;
72
73 uint32_t NoStretchMode;
75
76} FMPI2C_InitTypeDef;
77
81
109typedef enum
110{
111 HAL_FMPI2C_STATE_RESET = 0x00U,
112 HAL_FMPI2C_STATE_READY = 0x20U,
113 HAL_FMPI2C_STATE_BUSY = 0x24U,
114 HAL_FMPI2C_STATE_BUSY_TX = 0x21U,
115 HAL_FMPI2C_STATE_BUSY_RX = 0x22U,
116 HAL_FMPI2C_STATE_LISTEN = 0x28U,
117 HAL_FMPI2C_STATE_BUSY_TX_LISTEN = 0x29U,
119 HAL_FMPI2C_STATE_BUSY_RX_LISTEN = 0x2AU,
121 HAL_FMPI2C_STATE_ABORT = 0x60U,
122
123} HAL_FMPI2C_StateTypeDef;
124
128
147typedef enum
148{
149 HAL_FMPI2C_MODE_NONE = 0x00U,
150 HAL_FMPI2C_MODE_MASTER = 0x10U,
151 HAL_FMPI2C_MODE_SLAVE = 0x20U,
152 HAL_FMPI2C_MODE_MEM = 0x40U
153
154} HAL_FMPI2C_ModeTypeDef;
155
159
164#define HAL_FMPI2C_ERROR_NONE (0x00000000U)
165#define HAL_FMPI2C_ERROR_BERR (0x00000001U)
166#define HAL_FMPI2C_ERROR_ARLO (0x00000002U)
167#define HAL_FMPI2C_ERROR_AF (0x00000004U)
168#define HAL_FMPI2C_ERROR_OVR (0x00000008U)
169#define HAL_FMPI2C_ERROR_DMA (0x00000010U)
170#define HAL_FMPI2C_ERROR_TIMEOUT (0x00000020U)
171#define HAL_FMPI2C_ERROR_SIZE (0x00000040U)
172#define HAL_FMPI2C_ERROR_DMA_PARAM (0x00000080U)
173#if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
174#define HAL_FMPI2C_ERROR_INVALID_CALLBACK (0x00000100U)
175#endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
176#define HAL_FMPI2C_ERROR_INVALID_PARAM (0x00000200U)
180
185typedef struct __FMPI2C_HandleTypeDef
186{
187 FMPI2C_TypeDef *Instance;
188
189 FMPI2C_InitTypeDef Init;
190
191 uint8_t *pBuffPtr;
192
193 uint16_t XferSize;
194
195 __IO uint16_t XferCount;
196
197 __IO uint32_t XferOptions;
199
200 __IO uint32_t PreviousState;
201
202 HAL_StatusTypeDef(*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);
204
205 DMA_HandleTypeDef *hdmatx;
206
207 DMA_HandleTypeDef *hdmarx;
208
209
210 HAL_LockTypeDef Lock;
211
212 __IO HAL_FMPI2C_StateTypeDef State;
213
214 __IO HAL_FMPI2C_ModeTypeDef Mode;
215
216 __IO uint32_t ErrorCode;
217
218 __IO uint32_t AddrEventCount;
219
220 __IO uint32_t Devaddress;
221
222 __IO uint32_t Memaddress;
223
224#if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
225 void (* MasterTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
227 void (* MasterRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
229 void (* SlaveTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
231 void (* SlaveRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
233 void (* ListenCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
235 void (* MemTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
237 void (* MemRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
239 void (* ErrorCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
241 void (* AbortCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
243
244 void (* AddrCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
246
247 void (* MspInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
249 void (* MspDeInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c);
251
252#endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
253} FMPI2C_HandleTypeDef;
254
255#if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
259typedef enum
260{
261 HAL_FMPI2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
262 HAL_FMPI2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
263 HAL_FMPI2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
264 HAL_FMPI2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
265 HAL_FMPI2C_LISTEN_COMPLETE_CB_ID = 0x04U,
266 HAL_FMPI2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
267 HAL_FMPI2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
268 HAL_FMPI2C_ERROR_CB_ID = 0x07U,
269 HAL_FMPI2C_ABORT_CB_ID = 0x08U,
270
271 HAL_FMPI2C_MSPINIT_CB_ID = 0x09U,
272 HAL_FMPI2C_MSPDEINIT_CB_ID = 0x0AU
273
274} HAL_FMPI2C_CallbackIDTypeDef;
275
279typedef void (*pFMPI2C_CallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c);
281typedef void (*pFMPI2C_AddrCallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection,
282 uint16_t AddrMatchCode);
284
285#endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
289
293/* Exported constants --------------------------------------------------------*/
294
298
302#define FMPI2C_FIRST_FRAME ((uint32_t)FMPI2C_SOFTEND_MODE)
303#define FMPI2C_FIRST_AND_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
304#define FMPI2C_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
305#define FMPI2C_FIRST_AND_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
306#define FMPI2C_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
307#define FMPI2C_LAST_FRAME_NO_STOP ((uint32_t)FMPI2C_SOFTEND_MODE)
308
309/* List of XferOptions in usage of :
310 * 1- Restart condition in all use cases (direction change or not)
311 */
312#define FMPI2C_OTHER_FRAME (0x000000AAU)
313#define FMPI2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
317
321#define FMPI2C_ADDRESSINGMODE_7BIT (0x00000001U)
322#define FMPI2C_ADDRESSINGMODE_10BIT (0x00000002U)
326
330#define FMPI2C_DUALADDRESS_DISABLE (0x00000000U)
331#define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN
335
339#define FMPI2C_OA2_NOMASK ((uint8_t)0x00U)
340#define FMPI2C_OA2_MASK01 ((uint8_t)0x01U)
341#define FMPI2C_OA2_MASK02 ((uint8_t)0x02U)
342#define FMPI2C_OA2_MASK03 ((uint8_t)0x03U)
343#define FMPI2C_OA2_MASK04 ((uint8_t)0x04U)
344#define FMPI2C_OA2_MASK05 ((uint8_t)0x05U)
345#define FMPI2C_OA2_MASK06 ((uint8_t)0x06U)
346#define FMPI2C_OA2_MASK07 ((uint8_t)0x07U)
350
354#define FMPI2C_GENERALCALL_DISABLE (0x00000000U)
355#define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN
359
363#define FMPI2C_NOSTRETCH_DISABLE (0x00000000U)
364#define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH
368
372#define FMPI2C_MEMADD_SIZE_8BIT (0x00000001U)
373#define FMPI2C_MEMADD_SIZE_16BIT (0x00000002U)
377
381#define FMPI2C_DIRECTION_TRANSMIT (0x00000000U)
382#define FMPI2C_DIRECTION_RECEIVE (0x00000001U)
386
390#define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD
391#define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND
392#define FMPI2C_SOFTEND_MODE (0x00000000U)
396
400#define FMPI2C_NO_STARTSTOP (0x00000000U)
401#define FMPI2C_GENERATE_STOP (uint32_t)(0x80000000U | FMPI2C_CR2_STOP)
402#define FMPI2C_GENERATE_START_READ (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
403#define FMPI2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | FMPI2C_CR2_START)
407
414#define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE
415#define FMPI2C_IT_TCI FMPI2C_CR1_TCIE
416#define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE
417#define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE
418#define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE
419#define FMPI2C_IT_RXI FMPI2C_CR1_RXIE
420#define FMPI2C_IT_TXI FMPI2C_CR1_TXIE
424
428#define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE
429#define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS
430#define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE
431#define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR
432#define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF
433#define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF
434#define FMPI2C_FLAG_TC FMPI2C_ISR_TC
435#define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR
436#define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR
437#define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO
438#define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR
439#define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR
440#define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
441#define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT
442#define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY
443#define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR
447
451
452/* Exported macros -----------------------------------------------------------*/
453
457
462#if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
463#define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
464 (__HANDLE__)->State = HAL_FMPI2C_STATE_RESET; \
465 (__HANDLE__)->MspInitCallback = NULL; \
466 (__HANDLE__)->MspDeInitCallback = NULL; \
467 } while(0)
468#else
469#define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)
470#endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
471
486#define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
487
502#define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
503
518#define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \
519 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
520
544#define FMPI2C_FLAG_MASK (0x0001FFFFU)
545#define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
546 (__FLAG__)) == (__FLAG__)) ? SET : RESET)
547
565#define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? \
566 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
567 ((__HANDLE__)->Instance->ICR = (__FLAG__)))
568
573#define __HAL_FMPI2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
574
579#define __HAL_FMPI2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
580
585#define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))
589
590/* Include FMPI2C HAL Extended module */
591#include "stm32f4xx_hal_fmpi2c_ex.h"
592
593/* Exported functions --------------------------------------------------------*/
597
601/* Initialization and de-initialization functions******************************/
602HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c);
603HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c);
604void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c);
605void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c);
606
607/* Callbacks Register/UnRegister functions ***********************************/
608#if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1)
609HAL_StatusTypeDef HAL_FMPI2C_RegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID,
610 pFMPI2C_CallbackTypeDef pCallback);
611HAL_StatusTypeDef HAL_FMPI2C_UnRegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID);
612
613HAL_StatusTypeDef HAL_FMPI2C_RegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, pFMPI2C_AddrCallbackTypeDef pCallback);
614HAL_StatusTypeDef HAL_FMPI2C_UnRegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c);
615#endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */
619
623/* IO operation functions ****************************************************/
624/******* Blocking mode: Polling */
625HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
626 uint16_t Size, uint32_t Timeout);
627HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
628 uint16_t Size, uint32_t Timeout);
629HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
630 uint32_t Timeout);
631HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
632 uint32_t Timeout);
633HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
634 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
635HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
636 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
637HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials,
638 uint32_t Timeout);
639
640/******* Non-Blocking mode: Interrupt */
641HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
642 uint16_t Size);
643HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
644 uint16_t Size);
645HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
646HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
647HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
648 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
649HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
650 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
651
652HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
653 uint16_t Size, uint32_t XferOptions);
654HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
655 uint16_t Size, uint32_t XferOptions);
656HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
657 uint32_t XferOptions);
658HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
659 uint32_t XferOptions);
660HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
661HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
662HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress);
663
664/******* Non-Blocking mode: DMA */
665HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
666 uint16_t Size);
667HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
668 uint16_t Size);
669HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
670HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
671HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
672 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
673HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress,
674 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
675
676HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
677 uint16_t Size, uint32_t XferOptions);
678HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData,
679 uint16_t Size, uint32_t XferOptions);
680HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
681 uint32_t XferOptions);
682HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size,
683 uint32_t XferOptions);
687
691/******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
692void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
693void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
694void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
695void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
696void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
697void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
698void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
699void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
700void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
701void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
702void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c);
703void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
707
711/* Peripheral State, Mode and Error functions *********************************/
712HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(const FMPI2C_HandleTypeDef *hfmpi2c);
713HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(const FMPI2C_HandleTypeDef *hfmpi2c);
714uint32_t HAL_FMPI2C_GetError(const FMPI2C_HandleTypeDef *hfmpi2c);
715
719
723
724/* Private constants ---------------------------------------------------------*/
728
732
733/* Private macros ------------------------------------------------------------*/
737
738#define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \
739 ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))
740
741#define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \
742 ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))
743
744#define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \
745 ((MASK) == FMPI2C_OA2_MASK01) || \
746 ((MASK) == FMPI2C_OA2_MASK02) || \
747 ((MASK) == FMPI2C_OA2_MASK03) || \
748 ((MASK) == FMPI2C_OA2_MASK04) || \
749 ((MASK) == FMPI2C_OA2_MASK05) || \
750 ((MASK) == FMPI2C_OA2_MASK06) || \
751 ((MASK) == FMPI2C_OA2_MASK07))
752
753#define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \
754 ((CALL) == FMPI2C_GENERALCALL_ENABLE))
755
756#define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \
757 ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))
758
759#define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \
760 ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))
761
762#define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \
763 ((MODE) == FMPI2C_AUTOEND_MODE) || \
764 ((MODE) == FMPI2C_SOFTEND_MODE))
765
766#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \
767 ((REQUEST) == FMPI2C_GENERATE_START_READ) || \
768 ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \
769 ((REQUEST) == FMPI2C_NO_STARTSTOP))
770
771#define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_FIRST_FRAME) || \
772 ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \
773 ((REQUEST) == FMPI2C_NEXT_FRAME) || \
774 ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \
775 ((REQUEST) == FMPI2C_LAST_FRAME) || \
776 ((REQUEST) == FMPI2C_LAST_FRAME_NO_STOP) || \
777 IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
778
779#define IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_OTHER_FRAME) || \
780 ((REQUEST) == FMPI2C_OTHER_AND_LAST_FRAME))
781
782#define FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
783 (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | \
784 FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | \
785 FMPI2C_CR2_RD_WRN)))
786
787#define FMPI2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) \
788 >> 16U))
789#define FMPI2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) \
790 >> 16U))
791#define FMPI2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)
792#define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1))
793#define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2))
794
795#define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
796#define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
797
798#define FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
799 (uint16_t)(0xFF00U))) >> 8U)))
800#define FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
801
802#define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? \
803 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \
804 (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & \
805 (~FMPI2C_CR2_RD_WRN)) : \
806 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \
807 (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START) | \
808 (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)))
809
810#define FMPI2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & FMPI2C_FLAG_MASK)) == \
811 ((__FLAG__) & FMPI2C_FLAG_MASK)) ? SET : RESET)
812#define FMPI2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
816
817/* Private Functions ---------------------------------------------------------*/
821/* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */
825
829
833
834#endif /* FMPI2C_CR1_PE */
835#ifdef __cplusplus
836}
837#endif
838
839
840#endif /* STM32F4xx_HAL_FMPI2C_H */
DMA_HandleTypeDef
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
stm32f4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32f4xx_hal_def.h:39
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition stm32f4xx_hal_def.h:50
stm32f4xx_hal_fmpi2c_ex.h
Header file of FMPI2C HAL Extended module.