STM32F4xx HAL Driver master
STM32CubeF4 HAL / LL Drivers API Reference
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stm32f4xx_hal_cryp_ex.c
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1
35
36/* Includes ------------------------------------------------------------------*/
37#include "stm32f4xx_hal.h"
38
42#if defined (AES) || defined (CRYP)
43#if defined (CRYP_CR_ALGOMODE_AES_GCM)|| defined (AES)
48
49
50#ifdef HAL_CRYP_MODULE_ENABLED
51
52/* Private typedef -----------------------------------------------------------*/
53/* Private define ------------------------------------------------------------*/
57#if defined(AES)
58#define CRYP_PHASE_INIT 0x00000000U
59#define CRYP_PHASE_HEADER AES_CR_GCMPH_0
60#define CRYP_PHASE_PAYLOAD AES_CR_GCMPH_1
61#define CRYP_PHASE_FINAL AES_CR_GCMPH
62
63#define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U
64#define CRYP_OPERATINGMODE_KEYDERIVATION AES_CR_MODE_0
65#define CRYP_OPERATINGMODE_DECRYPT AES_CR_MODE_1
66#define CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT AES_CR_MODE
67
68#else /* CRYP */
69
70#define CRYP_PHASE_INIT 0x00000000U
71#define CRYP_PHASE_HEADER CRYP_CR_GCM_CCMPH_0
72#define CRYP_PHASE_PAYLOAD CRYP_CR_GCM_CCMPH_1
73#define CRYP_PHASE_FINAL CRYP_CR_GCM_CCMPH
74
75#define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U
76#define CRYP_OPERATINGMODE_DECRYPT CRYP_CR_ALGODIR
77#endif /* End AES or CRYP */
78
79#define CRYPEx_PHASE_PROCESS 0x02U
80#define CRYPEx_PHASE_FINAL 0x03U
81
82/* CTR0 information to use in CCM algorithm */
83#define CRYP_CCM_CTR0_0 0x07FFFFFFU
84#define CRYP_CCM_CTR0_3 0xFFFFFF00U
85
86
90
91/* Private macro -------------------------------------------------------------*/
92/* Private variables ---------------------------------------------------------*/
93/* Private function prototypes -----------------------------------------------*/
94
95
96/* Exported functions---------------------------------------------------------*/
100
117
118
127HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
128{
129 uint32_t tickstart;
130 /* Assume first Init.HeaderSize is in words */
131 uint64_t headerlength = (uint64_t)(hcryp->Init.HeaderSize) * 32U; /* Header length in bits */
132 uint64_t inputlength = (uint64_t)hcryp->SizesSum * 8U; /* Input length in bits */
133 uint32_t tagaddr = (uint32_t)AuthTag;
134
135 /* Correct headerlength if Init.HeaderSize is actually in bytes */
136 if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_BYTE)
137 {
138 headerlength /= 4U;
139 }
140
141 if (hcryp->State == HAL_CRYP_STATE_READY)
142 {
143 /* Process locked */
144 __HAL_LOCK(hcryp);
145
146 /* Change the CRYP peripheral state */
147 hcryp->State = HAL_CRYP_STATE_BUSY;
148
149 /* Check if initialization phase has already been performed */
150 if (hcryp->Phase == CRYPEx_PHASE_PROCESS)
151 {
152 /* Change the CRYP phase */
153 hcryp->Phase = CRYPEx_PHASE_FINAL;
154 }
155 else /* Initialization phase has not been performed*/
156 {
157 /* Disable the Peripheral */
158 __HAL_CRYP_DISABLE(hcryp);
159
160 /* Sequence error code field */
161 hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
162
163 /* Change the CRYP peripheral state */
164 hcryp->State = HAL_CRYP_STATE_READY;
165
166 /* Process unlocked */
167 __HAL_UNLOCK(hcryp);
168 return HAL_ERROR;
169 }
170
171#if defined(CRYP)
172
173 /* Disable CRYP to start the final phase */
174 __HAL_CRYP_DISABLE(hcryp);
175
176 /* Select final phase */
177 MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH, CRYP_PHASE_FINAL);
178
179 /*ALGODIR bit must be set to '0'.*/
180 hcryp->Instance->CR &= ~CRYP_CR_ALGODIR;
181
182 /* Enable the CRYP peripheral */
183 __HAL_CRYP_ENABLE(hcryp);
184
185 /* Write the number of bits in header (64 bits) followed by the number of bits
186 in the payload */
187 if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
188 {
189 hcryp->Instance->DIN = 0U;
190 hcryp->Instance->DIN = __RBIT((uint32_t)(headerlength));
191 hcryp->Instance->DIN = 0U;
192 hcryp->Instance->DIN = __RBIT((uint32_t)(inputlength));
193 }
194 else if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
195 {
196 hcryp->Instance->DIN = 0U;
197 hcryp->Instance->DIN = __REV((uint32_t)(headerlength));
198 hcryp->Instance->DIN = 0U;
199 hcryp->Instance->DIN = __REV((uint32_t)(inputlength));
200 }
201 else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
202 {
203 hcryp->Instance->DIN = 0U;
204 hcryp->Instance->DIN = __ROR((uint32_t)headerlength, 16U);
205 hcryp->Instance->DIN = 0U;
206 hcryp->Instance->DIN = __ROR((uint32_t)inputlength, 16U);
207 }
208 else if (hcryp->Init.DataType == CRYP_DATATYPE_32B)
209 {
210 hcryp->Instance->DIN = 0U;
211 hcryp->Instance->DIN = (uint32_t)(headerlength);
212 hcryp->Instance->DIN = 0U;
213 hcryp->Instance->DIN = (uint32_t)(inputlength);
214 }
215 else
216 {
217 /* Nothing to do */
218 }
219
220 /* Wait for OFNE flag to be raised */
221 tickstart = HAL_GetTick();
222 while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
223 {
224 /* Check for the Timeout */
225 if (Timeout != HAL_MAX_DELAY)
226 {
227 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
228 {
229 /* Disable the CRYP Peripheral Clock */
230 __HAL_CRYP_DISABLE(hcryp);
231
232 /* Change state */
233 hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
234 hcryp->State = HAL_CRYP_STATE_READY;
235
236 /* Process unlocked */
237 __HAL_UNLOCK(hcryp);
238 return HAL_ERROR;
239 }
240 }
241 }
242
243 /* Read the authentication TAG in the output FIFO */
244 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
245 tagaddr += 4U;
246 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
247 tagaddr += 4U;
248 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
249 tagaddr += 4U;
250 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
251
252#else /* AES*/
253
254 /* Select final phase */
255 MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
256
257 /* Write the number of bits in header (64 bits) followed by the number of bits
258 in the payload */
259 if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
260 {
261 hcryp->Instance->DINR = 0U;
262 hcryp->Instance->DINR = __RBIT((uint32_t)(headerlength));
263 hcryp->Instance->DINR = 0U;
264 hcryp->Instance->DINR = __RBIT((uint32_t)(inputlength));
265 }
266 else if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
267 {
268 hcryp->Instance->DINR = 0U;
269 hcryp->Instance->DINR = __REV((uint32_t)(headerlength));
270 hcryp->Instance->DINR = 0U;
271 hcryp->Instance->DINR = __REV((uint32_t)(inputlength));
272 }
273 else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
274 {
275 hcryp->Instance->DINR = 0U;
276 hcryp->Instance->DINR = __ROR((uint32_t)headerlength, 16U);
277 hcryp->Instance->DINR = 0U;
278 hcryp->Instance->DINR = __ROR((uint32_t)inputlength, 16U);
279 }
280 else if (hcryp->Init.DataType == CRYP_DATATYPE_32B)
281 {
282 hcryp->Instance->DINR = 0U;
283 hcryp->Instance->DINR = (uint32_t)(headerlength);
284 hcryp->Instance->DINR = 0U;
285 hcryp->Instance->DINR = (uint32_t)(inputlength);
286 }
287 else
288 {
289 /* Nothing to do */
290 }
291 /* Wait for CCF flag to be raised */
292 tickstart = HAL_GetTick();
293 while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
294 {
295 /* Check for the Timeout */
296 if (Timeout != HAL_MAX_DELAY)
297 {
298 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
299 {
300 /* Disable the CRYP peripheral clock */
301 __HAL_CRYP_DISABLE(hcryp);
302
303 /* Change state */
304 hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
305 hcryp->State = HAL_CRYP_STATE_READY;
306
307 /* Process unlocked */
308 __HAL_UNLOCK(hcryp);
309 return HAL_ERROR;
310 }
311 }
312 }
313
314 /* Read the authentication TAG in the output FIFO */
315 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
316 tagaddr += 4U;
317 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
318 tagaddr += 4U;
319 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
320 tagaddr += 4U;
321 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
322
323 /* Clear CCF flag */
324 __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
325
326#endif /* End AES or CRYP */
327
328 /* Disable the peripheral */
329 __HAL_CRYP_DISABLE(hcryp);
330
331 /* Change the CRYP peripheral state */
332 hcryp->State = HAL_CRYP_STATE_READY;
333
334 /* Process unlocked */
335 __HAL_UNLOCK(hcryp);
336 }
337 else
338 {
339 /* Busy error code field */
340 hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
341 return HAL_ERROR;
342 }
343 /* Return function status */
344 return HAL_OK;
345}
346
355HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
356{
357 uint32_t tagaddr = (uint32_t)AuthTag;
358 uint32_t ctr0 [4] = {0};
359 uint32_t ctr0addr = (uint32_t)ctr0;
360 uint32_t tickstart;
361
362 if (hcryp->State == HAL_CRYP_STATE_READY)
363 {
364 /* Process locked */
365 __HAL_LOCK(hcryp);
366
367 /* Change the CRYP peripheral state */
368 hcryp->State = HAL_CRYP_STATE_BUSY;
369
370 /* Check if initialization phase has already been performed */
371 if (hcryp->Phase == CRYPEx_PHASE_PROCESS)
372 {
373 /* Change the CRYP phase */
374 hcryp->Phase = CRYPEx_PHASE_FINAL;
375 }
376 else /* Initialization phase has not been performed*/
377 {
378 /* Disable the peripheral */
379 __HAL_CRYP_DISABLE(hcryp);
380
381 /* Sequence error code field */
382 hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
383
384 /* Change the CRYP peripheral state */
385 hcryp->State = HAL_CRYP_STATE_READY;
386
387 /* Process unlocked */
388 __HAL_UNLOCK(hcryp);
389 return HAL_ERROR;
390 }
391
392#if defined(CRYP)
393
394 /* Disable CRYP to start the final phase */
395 __HAL_CRYP_DISABLE(hcryp);
396
397 /* Select final phase & ALGODIR bit must be set to '0'. */
398 MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH | CRYP_CR_ALGODIR, CRYP_PHASE_FINAL | CRYP_OPERATINGMODE_ENCRYPT);
399
400 /* Enable the CRYP peripheral */
401 __HAL_CRYP_ENABLE(hcryp);
402
403 /* Write the counter block in the IN FIFO, CTR0 information from B0
404 data has to be swapped according to the DATATYPE*/
405 ctr0[0] = (hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
406 ctr0[1] = hcryp->Init.B0[1];
407 ctr0[2] = hcryp->Init.B0[2];
408 ctr0[3] = hcryp->Init.B0[3] & CRYP_CCM_CTR0_3;
409
410 if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
411 {
412 hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
413 ctr0addr += 4U;
414 hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
415 ctr0addr += 4U;
416 hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
417 ctr0addr += 4U;
418 hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
419 }
420 else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
421 {
422 hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
423 ctr0addr += 4U;
424 hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
425 ctr0addr += 4U;
426 hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
427 ctr0addr += 4U;
428 hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
429 }
430 else if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
431 {
432 hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
433 ctr0addr += 4U;
434 hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
435 ctr0addr += 4U;
436 hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
437 ctr0addr += 4U;
438 hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
439 }
440 else
441 {
442 hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
443 ctr0addr += 4U;
444 hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
445 ctr0addr += 4U;
446 hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
447 ctr0addr += 4U;
448 hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
449 }
450 /* Wait for OFNE flag to be raised */
451 tickstart = HAL_GetTick();
452 while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
453 {
454 /* Check for the Timeout */
455 if (Timeout != HAL_MAX_DELAY)
456 {
457 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
458 {
459 /* Disable the CRYP peripheral Clock */
460 __HAL_CRYP_DISABLE(hcryp);
461
462 /* Change state */
463 hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
464 hcryp->State = HAL_CRYP_STATE_READY;
465
466 /* Process unlocked */
467 __HAL_UNLOCK(hcryp);
468 return HAL_ERROR;
469 }
470 }
471 }
472
473 /* Read the Auth TAG in the IN FIFO */
474 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
475 tagaddr += 4U;
476 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
477 tagaddr += 4U;
478 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
479 tagaddr += 4U;
480 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
481
482#else /* AES */
483
484 /* Select final phase */
485 MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
486
487 /* Write the counter block in the IN FIFO, CTR0 information from B0
488 data has to be swapped according to the DATATYPE*/
489 if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
490 {
491 ctr0[0] = (__REV(hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0);
492 ctr0[1] = __REV(hcryp->Init.B0[1]);
493 ctr0[2] = __REV(hcryp->Init.B0[2]);
494 ctr0[3] = (__REV(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
495
496 hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
497 ctr0addr += 4U;
498 hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
499 ctr0addr += 4U;
500 hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
501 ctr0addr += 4U;
502 hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
503 }
504 else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
505 {
506 ctr0[0] = (__ROR((hcryp->Init.B0[0]), 16U)& CRYP_CCM_CTR0_0);
507 ctr0[1] = __ROR((hcryp->Init.B0[1]), 16U);
508 ctr0[2] = __ROR((hcryp->Init.B0[2]), 16U);
509 ctr0[3] = (__ROR((hcryp->Init.B0[3]), 16U)& CRYP_CCM_CTR0_3);
510
511 hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
512 ctr0addr += 4U;
513 hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
514 ctr0addr += 4U;
515 hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
516 ctr0addr += 4U;
517 hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
518 }
519 else if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
520 {
521 ctr0[0] = (__RBIT(hcryp->Init.B0[0])& CRYP_CCM_CTR0_0);
522 ctr0[1] = __RBIT(hcryp->Init.B0[1]);
523 ctr0[2] = __RBIT(hcryp->Init.B0[2]);
524 ctr0[3] = (__RBIT(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
525
526 hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
527 ctr0addr += 4U;
528 hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
529 ctr0addr += 4U;
530 hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
531 ctr0addr += 4U;
532 hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
533 }
534 else
535 {
536 ctr0[0] = (hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
537 ctr0[1] = hcryp->Init.B0[1];
538 ctr0[2] = hcryp->Init.B0[2];
539 ctr0[3] = hcryp->Init.B0[3] & CRYP_CCM_CTR0_3;
540
541 hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
542 ctr0addr += 4U;
543 hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
544 ctr0addr += 4U;
545 hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
546 ctr0addr += 4U;
547 hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
548 }
549
550 /* Wait for CCF flag to be raised */
551 tickstart = HAL_GetTick();
552 while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
553 {
554 /* Check for the Timeout */
555 if (Timeout != HAL_MAX_DELAY)
556 {
557 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
558 {
559 /* Disable the CRYP peripheral Clock */
560 __HAL_CRYP_DISABLE(hcryp);
561
562 /* Change state */
563 hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
564 hcryp->State = HAL_CRYP_STATE_READY;
565
566 /* Process unlocked */
567 __HAL_UNLOCK(hcryp);
568 return HAL_ERROR;
569 }
570 }
571 }
572
573 /* Read the authentication TAG in the output FIFO */
574 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
575 tagaddr += 4U;
576 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
577 tagaddr += 4U;
578 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
579 tagaddr += 4U;
580 *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
581
582 /* Clear CCF Flag */
583 __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
584
585#endif /* End of AES || CRYP */
586
587 /* Change the CRYP peripheral state */
588 hcryp->State = HAL_CRYP_STATE_READY;
589
590 /* Process unlocked */
591 __HAL_UNLOCK(hcryp);
592
593 /* Disable CRYP */
594 __HAL_CRYP_DISABLE(hcryp);
595 }
596 else
597 {
598 /* Busy error code field */
599 hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
600 return HAL_ERROR;
601 }
602 /* Return function status */
603 return HAL_OK;
604}
605
609
610#if defined (AES)
625
631void HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
632{
633 if (hcryp->State == HAL_CRYP_STATE_READY)
634 {
635 hcryp->AutoKeyDerivation = ENABLE;
636 }
637 else
638 {
639 /* Busy error code field */
640 hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
641 }
642}
648void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
649{
650 if (hcryp->State == HAL_CRYP_STATE_READY)
651 {
652 hcryp->AutoKeyDerivation = DISABLE;
653 }
654 else
655 {
656 /* Busy error code field */
657 hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
658 }
659}
660
664#endif /* AES or GCM CCM defined*/
665#endif /* AES */
666#endif /* HAL_CRYP_MODULE_ENABLED */
667
671#endif /* TinyAES or CRYP*/
675
679
HAL_GetTick
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
Definition stm32f4xx_hal.c:323
stm32f4xx_hal.h
This file contains all the functions prototypes for the HAL module driver.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32f4xx_hal_def.h:39
HAL_ERROR
@ HAL_ERROR
Definition stm32f4xx_hal_def.h:41
HAL_OK
@ HAL_OK
Definition stm32f4xx_hal_def.h:40
__HAL_UNLOCK
#define __HAL_UNLOCK(__HANDLE__)
Definition stm32f4xx_hal_def.h:105
HAL_IS_BIT_CLR
#define HAL_IS_BIT_CLR(REG, BIT)
Definition stm32f4xx_hal_def.h:64
HAL_MAX_DELAY
#define HAL_MAX_DELAY
Definition stm32f4xx_hal_def.h:61
__HAL_LOCK
#define __HAL_LOCK(__HANDLE__)
Definition stm32f4xx_hal_def.h:93