STM32F4xx HAL Driver master
STM32CubeF4 HAL / LL Drivers API Reference
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stm32f4xx_hal_cec.c
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1
111
112/* Includes ------------------------------------------------------------------*/
113#include "stm32f4xx_hal.h"
114
118
123#ifdef HAL_CEC_MODULE_ENABLED
124#if defined (CEC)
125
126/* Private typedef -----------------------------------------------------------*/
127/* Private define ------------------------------------------------------------*/
134
135/* Private macro -------------------------------------------------------------*/
136/* Private variables ---------------------------------------------------------*/
137/* Private function prototypes -----------------------------------------------*/
144
145/* Exported functions ---------------------------------------------------------*/
146
150
174
181HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
182{
183 /* Check the CEC handle allocation */
184 if ((hcec == NULL) || (hcec->Init.RxBuffer == NULL))
185 {
186 return HAL_ERROR;
187 }
188
189 /* Check the parameters */
190 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
191 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
192 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
193 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
194 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
195 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
196 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
197 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
198 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
199 assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
200
201#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
202 if (hcec->gState == HAL_CEC_STATE_RESET)
203 {
204 /* Allocate lock resource and initialize it */
205 hcec->Lock = HAL_UNLOCKED;
206
207 hcec->TxCpltCallback = HAL_CEC_TxCpltCallback; /* Legacy weak TxCpltCallback */
208 hcec->RxCpltCallback = HAL_CEC_RxCpltCallback; /* Legacy weak RxCpltCallback */
209 hcec->ErrorCallback = HAL_CEC_ErrorCallback; /* Legacy weak ErrorCallback */
210
211 if (hcec->MspInitCallback == NULL)
212 {
213 hcec->MspInitCallback = HAL_CEC_MspInit; /* Legacy weak MspInit */
214 }
215
216 /* Init the low level hardware */
217 hcec->MspInitCallback(hcec);
218 }
219#else
220 if (hcec->gState == HAL_CEC_STATE_RESET)
221 {
222 /* Allocate lock resource and initialize it */
223 hcec->Lock = HAL_UNLOCKED;
224 /* Init the low level hardware : GPIO, CLOCK */
225 HAL_CEC_MspInit(hcec);
226 }
227#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
228
229 hcec->gState = HAL_CEC_STATE_BUSY;
230
231 /* Disable the Peripheral */
232 __HAL_CEC_DISABLE(hcec);
233
234 /* Write to CEC Control Register */
235 hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop | \
236 hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | \
237 hcec->Init.BroadcastMsgNoErrorBitGen | \
238 hcec->Init.SignalFreeTimeOption | ((uint32_t)(hcec->Init.OwnAddress) << 16U) | \
239 hcec->Init.ListenMode;
240
241 /* Enable the following CEC Transmission/Reception interrupts as
242 * well as the following CEC Transmission/Reception Errors interrupts
243 * Rx Byte Received IT
244 * End of Reception IT
245 * Rx overrun
246 * Rx bit rising error
247 * Rx short bit period error
248 * Rx long bit period error
249 * Rx missing acknowledge
250 * Tx Byte Request IT
251 * End of Transmission IT
252 * Tx Missing Acknowledge IT
253 * Tx-Error IT
254 * Tx-Buffer Underrun IT
255 * Tx arbitration lost */
256 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR | CEC_IT_RXEND | CEC_IER_RX_ALL_ERR | CEC_IT_TXBR | CEC_IT_TXEND |
257 CEC_IER_TX_ALL_ERR);
258
259 /* Enable the CEC Peripheral */
260 __HAL_CEC_ENABLE(hcec);
261
262 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
263 hcec->gState = HAL_CEC_STATE_READY;
264 hcec->RxState = HAL_CEC_STATE_READY;
265
266 return HAL_OK;
267}
268
274HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
275{
276 /* Check the CEC handle allocation */
277 if (hcec == NULL)
278 {
279 return HAL_ERROR;
280 }
281
282 /* Check the parameters */
283 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
284
285 hcec->gState = HAL_CEC_STATE_BUSY;
286
287#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
288 if (hcec->MspDeInitCallback == NULL)
289 {
290 hcec->MspDeInitCallback = HAL_CEC_MspDeInit; /* Legacy weak MspDeInit */
291 }
292
293 /* DeInit the low level hardware */
294 hcec->MspDeInitCallback(hcec);
295
296#else
297 /* DeInit the low level hardware */
298 HAL_CEC_MspDeInit(hcec);
299#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
300
301 /* Disable the Peripheral */
302 __HAL_CEC_DISABLE(hcec);
303
304 /* Clear Flags */
305 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND | CEC_FLAG_TXBR | CEC_FLAG_RXBR | CEC_FLAG_RXEND | CEC_ISR_ALL_ERROR);
306
307 /* Disable the following CEC Transmission/Reception interrupts as
308 * well as the following CEC Transmission/Reception Errors interrupts
309 * Rx Byte Received IT
310 * End of Reception IT
311 * Rx overrun
312 * Rx bit rising error
313 * Rx short bit period error
314 * Rx long bit period error
315 * Rx missing acknowledge
316 * Tx Byte Request IT
317 * End of Transmission IT
318 * Tx Missing Acknowledge IT
319 * Tx-Error IT
320 * Tx-Buffer Underrun IT
321 * Tx arbitration lost */
322 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR | CEC_IT_RXEND | CEC_IER_RX_ALL_ERR | CEC_IT_TXBR | CEC_IT_TXEND |
323 CEC_IER_TX_ALL_ERR);
324
325 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
326 hcec->gState = HAL_CEC_STATE_RESET;
327 hcec->RxState = HAL_CEC_STATE_RESET;
328
329 /* Process Unlock */
330 __HAL_UNLOCK(hcec);
331
332 return HAL_OK;
333}
334
341HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
342{
343 /* Check the parameters */
344 assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
345
346 if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
347 {
348 /* Process Locked */
349 __HAL_LOCK(hcec);
350
351 hcec->gState = HAL_CEC_STATE_BUSY;
352
353 /* Disable the Peripheral */
354 __HAL_CEC_DISABLE(hcec);
355
356 if (CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
357 {
358 hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress << 16);
359 }
360 else
361 {
362 hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
363 }
364
365 hcec->gState = HAL_CEC_STATE_READY;
366 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
367
368 /* Process Unlocked */
369 __HAL_UNLOCK(hcec);
370
371 /* Enable the Peripheral */
372 __HAL_CEC_ENABLE(hcec);
373
374 return HAL_OK;
375 }
376 else
377 {
378 return HAL_BUSY;
379 }
380}
381
387__weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
388{
389 /* Prevent unused argument(s) compilation warning */
390 UNUSED(hcec);
391 /* NOTE : This function should not be modified, when the callback is needed,
392 the HAL_CEC_MspInit can be implemented in the user file
393 */
394}
395
401__weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
402{
403 /* Prevent unused argument(s) compilation warning */
404 UNUSED(hcec);
405 /* NOTE : This function should not be modified, when the callback is needed,
406 the HAL_CEC_MspDeInit can be implemented in the user file
407 */
408}
409#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
423HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID,
424 pCEC_CallbackTypeDef pCallback)
425{
426 HAL_StatusTypeDef status = HAL_OK;
427
428 if (pCallback == NULL)
429 {
430 /* Update the error code */
431 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
432 return HAL_ERROR;
433 }
434 /* Process locked */
435 __HAL_LOCK(hcec);
436
437 if (hcec->gState == HAL_CEC_STATE_READY)
438 {
439 switch (CallbackID)
440 {
441 case HAL_CEC_TX_CPLT_CB_ID :
442 hcec->TxCpltCallback = pCallback;
443 break;
444
445 case HAL_CEC_ERROR_CB_ID :
446 hcec->ErrorCallback = pCallback;
447 break;
448
449 case HAL_CEC_MSPINIT_CB_ID :
450 hcec->MspInitCallback = pCallback;
451 break;
452
453 case HAL_CEC_MSPDEINIT_CB_ID :
454 hcec->MspDeInitCallback = pCallback;
455 break;
456
457 default :
458 /* Update the error code */
459 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
460 /* Return error status */
461 status = HAL_ERROR;
462 break;
463 }
464 }
465 else if (hcec->gState == HAL_CEC_STATE_RESET)
466 {
467 switch (CallbackID)
468 {
469 case HAL_CEC_MSPINIT_CB_ID :
470 hcec->MspInitCallback = pCallback;
471 break;
472
473 case HAL_CEC_MSPDEINIT_CB_ID :
474 hcec->MspDeInitCallback = pCallback;
475 break;
476
477 default :
478 /* Update the error code */
479 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
480 /* Return error status */
481 status = HAL_ERROR;
482 break;
483 }
484 }
485 else
486 {
487 /* Update the error code */
488 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
489 /* Return error status */
490 status = HAL_ERROR;
491 }
492
493 /* Release Lock */
494 __HAL_UNLOCK(hcec);
495
496 return status;
497}
498
511HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID)
512{
513 HAL_StatusTypeDef status = HAL_OK;
514
515 /* Process locked */
516 __HAL_LOCK(hcec);
517
518 if (hcec->gState == HAL_CEC_STATE_READY)
519 {
520 switch (CallbackID)
521 {
522 case HAL_CEC_TX_CPLT_CB_ID :
523 hcec->TxCpltCallback = HAL_CEC_TxCpltCallback; /* Legacy weak TxCpltCallback */
524 break;
525
526 case HAL_CEC_ERROR_CB_ID :
527 hcec->ErrorCallback = HAL_CEC_ErrorCallback; /* Legacy weak ErrorCallback */
528 break;
529
530 case HAL_CEC_MSPINIT_CB_ID :
531 hcec->MspInitCallback = HAL_CEC_MspInit;
532 break;
533
534 case HAL_CEC_MSPDEINIT_CB_ID :
535 hcec->MspDeInitCallback = HAL_CEC_MspDeInit;
536 break;
537
538 default :
539 /* Update the error code */
540 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
541 /* Return error status */
542 status = HAL_ERROR;
543 break;
544 }
545 }
546 else if (hcec->gState == HAL_CEC_STATE_RESET)
547 {
548 switch (CallbackID)
549 {
550 case HAL_CEC_MSPINIT_CB_ID :
551 hcec->MspInitCallback = HAL_CEC_MspInit;
552 break;
553
554 case HAL_CEC_MSPDEINIT_CB_ID :
555 hcec->MspDeInitCallback = HAL_CEC_MspDeInit;
556 break;
557
558 default :
559 /* Update the error code */
560 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
561 /* Return error status */
562 status = HAL_ERROR;
563 break;
564 }
565 }
566 else
567 {
568 /* Update the error code */
569 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
570 /* Return error status */
571 status = HAL_ERROR;
572 }
573
574 /* Release Lock */
575 __HAL_UNLOCK(hcec);
576
577 return status;
578}
579
587HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback)
588{
589 HAL_StatusTypeDef status = HAL_OK;
590
591 if (pCallback == NULL)
592 {
593 /* Update the error code */
594 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
595 return HAL_ERROR;
596 }
597 /* Process locked */
598 __HAL_LOCK(hcec);
599
600 if (HAL_CEC_STATE_READY == hcec->RxState)
601 {
602 hcec->RxCpltCallback = pCallback;
603 }
604 else
605 {
606 /* Update the error code */
607 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
608 /* Return error status */
609 status = HAL_ERROR;
610 }
611
612 /* Release Lock */
613 __HAL_UNLOCK(hcec);
614 return status;
615}
616
623HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec)
624{
625 HAL_StatusTypeDef status = HAL_OK;
626
627 /* Process locked */
628 __HAL_LOCK(hcec);
629
630 if (HAL_CEC_STATE_READY == hcec->RxState)
631 {
632 hcec->RxCpltCallback = HAL_CEC_RxCpltCallback; /* Legacy weak CEC RxCpltCallback */
633 }
634 else
635 {
636 /* Update the error code */
637 hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
638 /* Return error status */
639 status = HAL_ERROR;
640 }
641
642 /* Release Lock */
643 __HAL_UNLOCK(hcec);
644 return status;
645}
646#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
647
651
685
697HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress,
698 const uint8_t *pData, uint32_t Size)
699{
700 /* if the peripheral isn't already busy and if there is no previous transmission
701 already pending due to arbitration lost */
702 if (hcec->gState == HAL_CEC_STATE_READY)
703 {
704 if ((pData == NULL) && (Size > 0U))
705 {
706 return HAL_ERROR;
707 }
708
709 assert_param(IS_CEC_ADDRESS(DestinationAddress));
710 assert_param(IS_CEC_ADDRESS(InitiatorAddress));
711 assert_param(IS_CEC_MSGSIZE(Size));
712
713 /* Process Locked */
714 __HAL_LOCK(hcec);
715 hcec->pTxBuffPtr = pData;
716 hcec->gState = HAL_CEC_STATE_BUSY_TX;
717 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
718
719 /* initialize the number of bytes to send,
720 * 0 means only one header is sent (ping operation) */
721 hcec->TxXferCount = (uint16_t)Size;
722
723 /* in case of no payload (Size = 0), sender is only pinging the system;
724 Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
725 if (Size == 0U)
726 {
727 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
728 }
729
730 /* send header block */
731 hcec->Instance->TXDR = (uint32_t)(((uint32_t)InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress);
732
733 /* Set TX Start of Message (TXSOM) bit */
734 __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
735
736 /* Process Unlocked */
737 __HAL_UNLOCK(hcec);
738
739 return HAL_OK;
740
741 }
742 else
743 {
744 return HAL_BUSY;
745 }
746}
747
753uint32_t HAL_CEC_GetLastReceivedFrameSize(const CEC_HandleTypeDef *hcec)
754{
755 return hcec->RxXferSize;
756}
757
765void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer)
766{
767 hcec->Init.RxBuffer = Rxbuffer;
768}
769
775void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
776{
777
778 /* save interrupts register for further error or interrupts handling purposes */
779 uint32_t itflag;
780 itflag = hcec->Instance->ISR;
781
782
783 /* ----------------------------Arbitration Lost Management----------------------------------*/
784 /* CEC TX arbitration error interrupt occurred --------------------------------------*/
785 if (HAL_IS_BIT_SET(itflag, CEC_FLAG_ARBLST))
786 {
787 hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
788 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
789 }
790
791 /* ----------------------------Rx Management----------------------------------*/
792 /* CEC RX byte received interrupt ---------------------------------------------------*/
793 if (HAL_IS_BIT_SET(itflag, CEC_FLAG_RXBR))
794 {
795 /* reception is starting */
796 hcec->RxState = HAL_CEC_STATE_BUSY_RX;
797 hcec->RxXferSize++;
798 /* read received byte */
799 *hcec->Init.RxBuffer = (uint8_t) hcec->Instance->RXDR;
800 hcec->Init.RxBuffer++;
801 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
802 }
803
804 /* CEC RX end received interrupt ---------------------------------------------------*/
805 if (HAL_IS_BIT_SET(itflag, CEC_FLAG_RXEND))
806 {
807 /* clear IT */
808 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
809
810 /* Rx process is completed, restore hcec->RxState to Ready */
811 hcec->RxState = HAL_CEC_STATE_READY;
812 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
813 hcec->Init.RxBuffer -= hcec->RxXferSize;
814#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
815 hcec->RxCpltCallback(hcec, hcec->RxXferSize);
816#else
817 HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
818#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
819 hcec->RxXferSize = 0U;
820 }
821
822 /* ----------------------------Tx Management----------------------------------*/
823 /* CEC TX byte request interrupt ------------------------------------------------*/
824 if (HAL_IS_BIT_SET(itflag, CEC_FLAG_TXBR))
825 {
826 --hcec->TxXferCount;
827 if (hcec->TxXferCount == 0U)
828 {
829 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
830 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
831 }
832 /* In all cases transmit the byte */
833 hcec->Instance->TXDR = (uint8_t) * hcec->pTxBuffPtr;
834 hcec->pTxBuffPtr++;
835 /* clear Tx-Byte request flag */
836 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXBR);
837 }
838
839 /* CEC TX end interrupt ------------------------------------------------*/
840 if (HAL_IS_BIT_SET(itflag, CEC_FLAG_TXEND))
841 {
842 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
843
844 /* Tx process is ended, restore hcec->gState to Ready */
845 hcec->gState = HAL_CEC_STATE_READY;
846 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
847 start again the Transmission under the Tx call back API */
848 __HAL_UNLOCK(hcec);
849 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
850#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
851 hcec->TxCpltCallback(hcec);
852#else
853 HAL_CEC_TxCpltCallback(hcec);
854#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
855 }
856
857 /* ----------------------------Rx/Tx Error Management----------------------------------*/
858 if ((itflag & (CEC_ISR_RXOVR | CEC_ISR_BRE | CEC_ISR_SBPE | CEC_ISR_LBPE | CEC_ISR_RXACKE | CEC_ISR_TXUDR |
859 CEC_ISR_TXERR | CEC_ISR_TXACKE)) != 0U)
860 {
861 hcec->ErrorCode = itflag;
862 __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR | HAL_CEC_ERROR_BRE | CEC_FLAG_LBPE | CEC_FLAG_SBPE |
863 HAL_CEC_ERROR_RXACKE | HAL_CEC_ERROR_TXUDR | HAL_CEC_ERROR_TXERR | HAL_CEC_ERROR_TXACKE);
864
865
866 if ((itflag & (CEC_ISR_RXOVR | CEC_ISR_BRE | CEC_ISR_SBPE | CEC_ISR_LBPE | CEC_ISR_RXACKE)) != 0U)
867 {
868 hcec->Init.RxBuffer -= hcec->RxXferSize;
869 hcec->RxXferSize = 0U;
870 hcec->RxState = HAL_CEC_STATE_READY;
871 }
872 else if (((itflag & CEC_ISR_ARBLST) == 0U) && ((itflag & (CEC_ISR_TXUDR | CEC_ISR_TXERR | CEC_ISR_TXACKE)) != 0U))
873 {
874 /* Set the CEC state ready to be able to start again the process */
875 hcec->gState = HAL_CEC_STATE_READY;
876 }
877 else
878 {
879 /* Nothing todo*/
880 }
881#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
882 hcec->ErrorCallback(hcec);
883#else
884 /* Error Call Back */
885 HAL_CEC_ErrorCallback(hcec);
886#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
887 }
888 else
889 {
890 /* Nothing todo*/
891 }
892}
893
899__weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
900{
901 /* Prevent unused argument(s) compilation warning */
902 UNUSED(hcec);
903 /* NOTE : This function should not be modified, when the callback is needed,
904 the HAL_CEC_TxCpltCallback can be implemented in the user file
905 */
906}
907
914__weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
915{
916 /* Prevent unused argument(s) compilation warning */
917 UNUSED(hcec);
918 UNUSED(RxFrameSize);
919 /* NOTE : This function should not be modified, when the callback is needed,
920 the HAL_CEC_RxCpltCallback can be implemented in the user file
921 */
922}
923
929__weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
930{
931 /* Prevent unused argument(s) compilation warning */
932 UNUSED(hcec);
933 /* NOTE : This function should not be modified, when the callback is needed,
934 the HAL_CEC_ErrorCallback can be implemented in the user file
935 */
936}
940
961HAL_CEC_StateTypeDef HAL_CEC_GetState(const CEC_HandleTypeDef *hcec)
962{
963 uint32_t temp1;
964 uint32_t temp2;
965 temp1 = hcec->gState;
966 temp2 = hcec->RxState;
967
968 return (HAL_CEC_StateTypeDef)(temp1 | temp2);
969}
970
977uint32_t HAL_CEC_GetError(const CEC_HandleTypeDef *hcec)
978{
979 return hcec->ErrorCode;
980}
981
985
989#endif /* CEC */
990#endif /* HAL_CEC_MODULE_ENABLED */
994
#define assert_param(expr)
This file contains all the functions prototypes for the HAL module driver.
#define HAL_IS_BIT_SET(REG, BIT)
HAL_StatusTypeDef
HAL Status structures definition.
@ HAL_ERROR
@ HAL_OK
@ HAL_BUSY
#define __HAL_UNLOCK(__HANDLE__)
@ HAL_UNLOCKED
#define __HAL_LOCK(__HANDLE__)