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STM32F4xx HAL Driver master
STM32CubeF4 HAL / LL Drivers API Reference
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Macros | |
| #define | TIM_OCMODE_TIMING 0x00000000U |
| #define | TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 |
| #define | TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 |
| #define | TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
| #define | TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) |
| #define | TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
| #define | TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) |
| #define | TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2 |
| #define TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 |
Set channel to active level on match
Definition at line 903 of file stm32f4xx_hal_tim.h.
| #define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) |
Force active level
Definition at line 908 of file stm32f4xx_hal_tim.h.
| #define TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2 |
Force inactive level
Definition at line 909 of file stm32f4xx_hal_tim.h.
| #define TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 |
Set channel to inactive level on match
Definition at line 904 of file stm32f4xx_hal_tim.h.
| #define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) |
PWM mode 1
Definition at line 906 of file stm32f4xx_hal_tim.h.
| #define TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
PWM mode 2
Definition at line 907 of file stm32f4xx_hal_tim.h.
| #define TIM_OCMODE_TIMING 0x00000000U |
Frozen
Definition at line 902 of file stm32f4xx_hal_tim.h.
| #define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
Toggle
Definition at line 905 of file stm32f4xx_hal_tim.h.